Home
last modified time | relevance | path

Searched refs:reg_uart_clk_div (Results 1 – 2 of 2) sorted by relevance

/hal_telink-latest/tlsr9/drivers/B91/reg_include/
Duart_reg.h40 #define reg_uart_clk_div(i) REG_ADDR16(0x140084+(i)*0x40) macro
/hal_telink-latest/tlsr9/drivers/B91/
Duart.c165 reg_uart_clk_div(uart_num) = (div | FLD_UART_CLK_DIV_EN); //set div_clock in uart_init()