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Searched refs:reg_spi_mode0 (Results 1 – 3 of 3) sorted by relevance

/hal_telink-latest/tlsr9/drivers/B91/
Dspi.c268 reg_spi_mode0(spi_sel) |= FLD_SPI_MASTER_MODE;//master in spi_master_init()
269 reg_spi_mode0(spi_sel) &= (~FLD_SPI_MODE_WORK_MODE); // clear spi working mode in spi_master_init()
270 reg_spi_mode0(spi_sel) |= (mode << 5);// select SPI mode, support four modes in spi_master_init()
288 reg_spi_mode0(spi_sel) &= (~FLD_SPI_MASTER_MODE);//slave in spi_slave_init()
289 reg_spi_mode0(spi_sel) &= (~FLD_SPI_MODE_WORK_MODE); // clear spi working mode in spi_slave_init()
290 reg_spi_mode0(spi_sel) |= (mode << 5);// select SPI mode, support four modes in spi_slave_init()
Dspi.h502 BM_SET(reg_spi_mode0(spi_sel), FLD_SPI_DUAL); in spi_dual_mode_en()
512 BM_CLR(reg_spi_mode0(spi_sel), FLD_SPI_DUAL); in spi_dual_mode_dis()
522 BM_SET(reg_spi_mode0(spi_sel), FLD_SPI_3LINE); in spi_3line_mode_en()
532 BM_CLR(reg_spi_mode0(spi_sel), FLD_SPI_3LINE); in spi_3line_mode_dis()
/hal_telink-latest/tlsr9/drivers/B91/reg_include/
Dspi_reg.h56 #define reg_spi_mode0(i) REG_ADDR8(PSPI_BASE_ADDR+(i)*BASE_ADDR_DIFF) macro