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Searched refs:reg_spi_fifo_state (Results 1 – 3 of 3) sorted by relevance

/hal_telink-latest/tlsr9/drivers/B91/reg_include/
Dspi_reg.h239 #define reg_spi_fifo_state(i) REG_ADDR8(PSPI_BASE_ADDR+0x0d+(i)*BASE_ADDR_DIFF) macro
/hal_telink-latest/tlsr9/drivers/B91/
Dspi.h413 BM_SET(reg_spi_fifo_state(spi_sel), FLD_SPI_TXF_CLR); in spi_tx_fifo_clr()
423 BM_SET(reg_spi_fifo_state(spi_sel), FLD_SPI_RXF_CLR); in spi_rx_fifo_clr()
Dspi.c503 while (reg_spi_fifo_state(spi_sel) & FLD_SPI_TXF_FULL); in spi_write()
520 while (reg_spi_fifo_state(spi_sel) & FLD_SPI_RXF_EMPTY); in spi_read()