Searched refs:reg_gpio_irq_risc0_en (Results 1 – 2 of 2) sorted by relevance
375 BM_SET(reg_gpio_irq_risc0_en(pin), pin & 0xff); in gpio_gpio2risc0_irq_en()384 BM_CLR(reg_gpio_irq_risc0_en(pin), pin & 0xff); in gpio_gpio2risc0_irq_dis()
143 #define reg_gpio_irq_risc0_en(i) REG_ADDR8(0x140338 + (i >> 8)) // reg_irq_mask: FLD_IRQ_GPIO_R… macro
