1 /******************************************************************************
2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
3 * All rights reserved.
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************/
18
19 /********************************************************************************************************
20 * @file gpio_default.h
21 *
22 * @brief This is the header file for B91
23 *
24 * @author Driver Group
25 *
26 *******************************************************************************************************/
27 #ifndef DRIVERS_GPIO_DEFAULT_H_
28 #define DRIVERS_GPIO_DEFAULT_H_
29
30 #include "compiler.h"
31 #include "gpio.h"
32 /**********************************************************************************************************************
33 * GPIO setting *
34 *********************************************************************************************************************/
35 #ifndef PA0_INPUT_ENABLE
36 #define PA0_INPUT_ENABLE 0
37 #endif
38 #ifndef PA1_INPUT_ENABLE
39 #define PA1_INPUT_ENABLE 0
40 #endif
41 #ifndef PA2_INPUT_ENABLE
42 #define PA2_INPUT_ENABLE 0
43 #endif
44 #ifndef PA3_INPUT_ENABLE
45 #define PA3_INPUT_ENABLE 0
46 #endif
47 #ifndef PA4_INPUT_ENABLE
48 #define PA4_INPUT_ENABLE 0
49 #endif
50 #ifndef PA5_INPUT_ENABLE
51 #define PA5_INPUT_ENABLE 0 //USB
52 #endif
53 #ifndef PA6_INPUT_ENABLE
54 #define PA6_INPUT_ENABLE 0 //USB
55 #endif
56 #ifndef PA7_INPUT_ENABLE
57 #define PA7_INPUT_ENABLE 1 //SWS
58 #endif
59 #ifndef PA0_OUTPUT_ENABLE
60 #define PA0_OUTPUT_ENABLE 0
61 #endif
62 #ifndef PA1_OUTPUT_ENABLE
63 #define PA1_OUTPUT_ENABLE 0
64 #endif
65 #ifndef PA2_OUTPUT_ENABLE
66 #define PA2_OUTPUT_ENABLE 0
67 #endif
68 #ifndef PA3_OUTPUT_ENABLE
69 #define PA3_OUTPUT_ENABLE 0
70 #endif
71 #ifndef PA4_OUTPUT_ENABLE
72 #define PA4_OUTPUT_ENABLE 0
73 #endif
74 #ifndef PA5_OUTPUT_ENABLE
75 #define PA5_OUTPUT_ENABLE 0
76 #endif
77 #ifndef PA6_OUTPUT_ENABLE
78 #define PA6_OUTPUT_ENABLE 0
79 #endif
80 #ifndef PA7_OUTPUT_ENABLE
81 #define PA7_OUTPUT_ENABLE 0
82 #endif
83 #ifndef PA0_DATA_STRENGTH
84 #define PA0_DATA_STRENGTH 1
85 #endif
86 #ifndef PA1_DATA_STRENGTH
87 #define PA1_DATA_STRENGTH 1
88 #endif
89 #ifndef PA2_DATA_STRENGTH
90 #define PA2_DATA_STRENGTH 1
91 #endif
92 #ifndef PA3_DATA_STRENGTH
93 #define PA3_DATA_STRENGTH 1
94 #endif
95 #ifndef PA4_DATA_STRENGTH
96 #define PA4_DATA_STRENGTH 1
97 #endif
98 #ifndef PA5_DATA_STRENGTH
99 #define PA5_DATA_STRENGTH 1
100 #endif
101 #ifndef PA6_DATA_STRENGTH
102 #define PA6_DATA_STRENGTH 1
103 #endif
104 #ifndef PA7_DATA_STRENGTH
105 #define PA7_DATA_STRENGTH 1
106 #endif
107 #ifndef PA0_DATA_OUT
108 #define PA0_DATA_OUT 0
109 #endif
110 #ifndef PA1_DATA_OUT
111 #define PA1_DATA_OUT 0
112 #endif
113 #ifndef PA2_DATA_OUT
114 #define PA2_DATA_OUT 0
115 #endif
116 #ifndef PA3_DATA_OUT
117 #define PA3_DATA_OUT 0
118 #endif
119 #ifndef PA4_DATA_OUT
120 #define PA4_DATA_OUT 0
121 #endif
122 #ifndef PA5_DATA_OUT
123 #define PA5_DATA_OUT 0
124 #endif
125 #ifndef PA6_DATA_OUT
126 #define PA6_DATA_OUT 0
127 #endif
128 #ifndef PA7_DATA_OUT
129 #define PA7_DATA_OUT 0
130 #endif
131 #ifndef PA0_FUNC
132 #define PA0_FUNC AS_GPIO
133 #endif
134 #ifndef PA1_FUNC
135 #define PA1_FUNC AS_GPIO
136 #endif
137 #ifndef PA2_FUNC
138 #define PA2_FUNC AS_GPIO
139 #endif
140 #ifndef PA3_FUNC
141 #define PA3_FUNC AS_GPIO
142 #endif
143 #ifndef PA4_FUNC
144 #define PA4_FUNC AS_GPIO
145 #endif
146 #ifndef PA5_FUNC
147 #define PA5_FUNC AS_GPIO
148 #endif
149 #ifndef PA6_FUNC
150 #define PA6_FUNC AS_GPIO
151 #endif
152 #ifndef PA7_FUNC
153 #define PA7_FUNC AS_SWS
154 #endif
155 #ifndef PULL_WAKEUP_SRC_PA0
156 #define PULL_WAKEUP_SRC_PA0 0
157 #endif
158 #ifndef PULL_WAKEUP_SRC_PA1
159 #define PULL_WAKEUP_SRC_PA1 0
160 #endif
161 #ifndef PULL_WAKEUP_SRC_PA2
162 #define PULL_WAKEUP_SRC_PA2 0
163 #endif
164 #ifndef PULL_WAKEUP_SRC_PA3
165 #define PULL_WAKEUP_SRC_PA3 0
166 #endif
167 #ifndef PULL_WAKEUP_SRC_PA4
168 #define PULL_WAKEUP_SRC_PA4 0
169 #endif
170 #ifndef PULL_WAKEUP_SRC_PA5
171 #define PULL_WAKEUP_SRC_PA5 0
172 #endif
173 #ifndef PULL_WAKEUP_SRC_PA6
174 #define PULL_WAKEUP_SRC_PA6 0
175 #endif
176 #ifndef PULL_WAKEUP_SRC_PA7
177 #define PULL_WAKEUP_SRC_PA7 GPIO_PIN_PULLUP_1M //sws pullup
178 #endif
179
180 //////////////////////////////////////////////////
181 #ifndef PB0_INPUT_ENABLE
182 #define PB0_INPUT_ENABLE 0
183 #endif
184 #ifndef PB1_INPUT_ENABLE
185 #define PB1_INPUT_ENABLE 0
186 #endif
187 #ifndef PB2_INPUT_ENABLE
188 #define PB2_INPUT_ENABLE 0
189 #endif
190 #ifndef PB3_INPUT_ENABLE
191 #define PB3_INPUT_ENABLE 0
192 #endif
193 #ifndef PB4_INPUT_ENABLE
194 #define PB4_INPUT_ENABLE 0
195 #endif
196 #ifndef PB5_INPUT_ENABLE
197 #define PB5_INPUT_ENABLE 0
198 #endif
199 #ifndef PB6_INPUT_ENABLE
200 #define PB6_INPUT_ENABLE 0
201 #endif
202 #ifndef PB7_INPUT_ENABLE
203 #define PB7_INPUT_ENABLE 0
204 #endif
205 #ifndef PB0_OUTPUT_ENABLE
206 #define PB0_OUTPUT_ENABLE 0
207 #endif
208 #ifndef PB1_OUTPUT_ENABLE
209 #define PB1_OUTPUT_ENABLE 0
210 #endif
211 #ifndef PB2_OUTPUT_ENABLE
212 #define PB2_OUTPUT_ENABLE 0
213 #endif
214 #ifndef PB3_OUTPUT_ENABLE
215 #define PB3_OUTPUT_ENABLE 0
216 #endif
217 #ifndef PB4_OUTPUT_ENABLE
218 #define PB4_OUTPUT_ENABLE 0
219 #endif
220 #ifndef PB5_OUTPUT_ENABLE
221 #define PB5_OUTPUT_ENABLE 0
222 #endif
223 #ifndef PB6_OUTPUT_ENABLE
224 #define PB6_OUTPUT_ENABLE 0
225 #endif
226 #ifndef PB7_OUTPUT_ENABLE
227 #define PB7_OUTPUT_ENABLE 0
228 #endif
229 #ifndef PB0_DATA_STRENGTH
230 #define PB0_DATA_STRENGTH 1
231 #endif
232 #ifndef PB1_DATA_STRENGTH
233 #define PB1_DATA_STRENGTH 1
234 #endif
235 #ifndef PB2_DATA_STRENGTH
236 #define PB2_DATA_STRENGTH 1
237 #endif
238 #ifndef PB3_DATA_STRENGTH
239 #define PB3_DATA_STRENGTH 1
240 #endif
241 #ifndef PB4_DATA_STRENGTH
242 #define PB4_DATA_STRENGTH 1
243 #endif
244 #ifndef PB5_DATA_STRENGTH
245 #define PB5_DATA_STRENGTH 1
246 #endif
247 #ifndef PB6_DATA_STRENGTH
248 #define PB6_DATA_STRENGTH 1
249 #endif
250 #ifndef PB7_DATA_STRENGTH
251 #define PB7_DATA_STRENGTH 1
252 #endif
253 #ifndef PB0_DATA_OUT
254 #define PB0_DATA_OUT 0
255 #endif
256 #ifndef PB1_DATA_OUT
257 #define PB1_DATA_OUT 0
258 #endif
259 #ifndef PB2_DATA_OUT
260 #define PB2_DATA_OUT 0
261 #endif
262 #ifndef PB3_DATA_OUT
263 #define PB3_DATA_OUT 0
264 #endif
265 #ifndef PB4_DATA_OUT
266 #define PB4_DATA_OUT 0
267 #endif
268 #ifndef PB5_DATA_OUT
269 #define PB5_DATA_OUT 0
270 #endif
271 #ifndef PB6_DATA_OUT
272 #define PB6_DATA_OUT 0
273 #endif
274 #ifndef PB7_DATA_OUT
275 #define PB7_DATA_OUT 0
276 #endif
277 #ifndef PB0_FUNC
278 #define PB0_FUNC AS_GPIO
279 #endif
280 #ifndef PB1_FUNC
281 #define PB1_FUNC AS_GPIO
282 #endif
283 #ifndef PB2_FUNC
284 #define PB2_FUNC AS_GPIO
285 #endif
286 #ifndef PB3_FUNC
287 #define PB3_FUNC AS_GPIO
288 #endif
289 #ifndef PB4_FUNC
290 #define PB4_FUNC AS_GPIO
291 #endif
292 #ifndef PB5_FUNC
293 #define PB5_FUNC AS_GPIO
294 #endif
295 #ifndef PB6_FUNC
296 #define PB6_FUNC AS_GPIO
297 #endif
298 #ifndef PB7_FUNC
299 #define PB7_FUNC AS_GPIO
300 #endif
301 #ifndef PULL_WAKEUP_SRC_PB0
302 #define PULL_WAKEUP_SRC_PB0 0
303 #endif
304 #ifndef PULL_WAKEUP_SRC_PB1
305 #define PULL_WAKEUP_SRC_PB1 0
306 #endif
307 #ifndef PULL_WAKEUP_SRC_PB2
308 #define PULL_WAKEUP_SRC_PB2 0
309 #endif
310 #ifndef PULL_WAKEUP_SRC_PB3
311 #define PULL_WAKEUP_SRC_PB3 0
312 #endif
313 #ifndef PULL_WAKEUP_SRC_PB4
314 #define PULL_WAKEUP_SRC_PB4 0
315 #endif
316 #ifndef PULL_WAKEUP_SRC_PB5
317 #define PULL_WAKEUP_SRC_PB5 0
318 #endif
319 #ifndef PULL_WAKEUP_SRC_PB6
320 #define PULL_WAKEUP_SRC_PB6 0
321 #endif
322 #ifndef PULL_WAKEUP_SRC_PB7
323 #define PULL_WAKEUP_SRC_PB7 0
324 #endif
325
326 //////////////////////////////////////////////////
327 #ifndef PC0_INPUT_ENABLE
328 #define PC0_INPUT_ENABLE 0
329 #endif
330 #ifndef PC1_INPUT_ENABLE
331 #define PC1_INPUT_ENABLE 0
332 #endif
333 #ifndef PC2_INPUT_ENABLE
334 #define PC2_INPUT_ENABLE 0
335 #endif
336 #ifndef PC3_INPUT_ENABLE
337 #define PC3_INPUT_ENABLE 0
338 #endif
339 #ifndef PC4_INPUT_ENABLE
340 #define PC4_INPUT_ENABLE 0
341 #endif
342 #ifndef PC5_INPUT_ENABLE
343 #define PC5_INPUT_ENABLE 0
344 #endif
345 #ifndef PC6_INPUT_ENABLE
346 #define PC6_INPUT_ENABLE 0
347 #endif
348 #ifndef PC7_INPUT_ENABLE
349 #define PC7_INPUT_ENABLE 0
350 #endif
351 #ifndef PC0_OUTPUT_ENABLE
352 #define PC0_OUTPUT_ENABLE 0
353 #endif
354 #ifndef PC1_OUTPUT_ENABLE
355 #define PC1_OUTPUT_ENABLE 0
356 #endif
357 #ifndef PC2_OUTPUT_ENABLE
358 #define PC2_OUTPUT_ENABLE 0
359 #endif
360 #ifndef PC3_OUTPUT_ENABLE
361 #define PC3_OUTPUT_ENABLE 0
362 #endif
363 #ifndef PC4_OUTPUT_ENABLE
364 #define PC4_OUTPUT_ENABLE 0
365 #endif
366 #ifndef PC5_OUTPUT_ENABLE
367 #define PC5_OUTPUT_ENABLE 0
368 #endif
369 #ifndef PC6_OUTPUT_ENABLE
370 #define PC6_OUTPUT_ENABLE 0
371 #endif
372 #ifndef PC7_OUTPUT_ENABLE
373 #define PC7_OUTPUT_ENABLE 0
374 #endif
375 #ifndef PC0_DATA_STRENGTH
376 #define PC0_DATA_STRENGTH 1
377 #endif
378 #ifndef PC1_DATA_STRENGTH
379 #define PC1_DATA_STRENGTH 1
380 #endif
381 #ifndef PC2_DATA_STRENGTH
382 #define PC2_DATA_STRENGTH 1
383 #endif
384 #ifndef PC3_DATA_STRENGTH
385 #define PC3_DATA_STRENGTH 1
386 #endif
387 #ifndef PC4_DATA_STRENGTH
388 #define PC4_DATA_STRENGTH 1
389 #endif
390 #ifndef PC5_DATA_STRENGTH
391 #define PC5_DATA_STRENGTH 1
392 #endif
393 #ifndef PC6_DATA_STRENGTH
394 #define PC6_DATA_STRENGTH 1
395 #endif
396 #ifndef PC7_DATA_STRENGTH
397 #define PC7_DATA_STRENGTH 1
398 #endif
399 #ifndef PC0_DATA_OUT
400 #define PC0_DATA_OUT 0
401 #endif
402 #ifndef PC1_DATA_OUT
403 #define PC1_DATA_OUT 0
404 #endif
405 #ifndef PC2_DATA_OUT
406 #define PC2_DATA_OUT 0
407 #endif
408 #ifndef PC3_DATA_OUT
409 #define PC3_DATA_OUT 0
410 #endif
411 #ifndef PC4_DATA_OUT
412 #define PC4_DATA_OUT 0
413 #endif
414 #ifndef PC5_DATA_OUT
415 #define PC5_DATA_OUT 0
416 #endif
417 #ifndef PC6_DATA_OUT
418 #define PC6_DATA_OUT 0
419 #endif
420 #ifndef PC7_DATA_OUT
421 #define PC7_DATA_OUT 0
422 #endif
423 #ifndef PC0_FUNC
424 #define PC0_FUNC AS_GPIO
425 #endif
426 #ifndef PC1_FUNC
427 #define PC1_FUNC AS_GPIO
428 #endif
429 #ifndef PC2_FUNC
430 #define PC2_FUNC AS_GPIO
431 #endif
432 #ifndef PC3_FUNC
433 #define PC3_FUNC AS_GPIO
434 #endif
435 #ifndef PC4_FUNC
436 #define PC4_FUNC AS_GPIO
437 #endif
438 #ifndef PC5_FUNC
439 #define PC5_FUNC AS_GPIO
440 #endif
441 #ifndef PC6_FUNC
442 #define PC6_FUNC AS_GPIO
443 #endif
444 #ifndef PC7_FUNC
445 #define PC7_FUNC AS_GPIO
446 #endif
447 #ifndef PULL_WAKEUP_SRC_PC0
448 #define PULL_WAKEUP_SRC_PC0 0
449 #endif
450 #ifndef PULL_WAKEUP_SRC_PC1
451 #define PULL_WAKEUP_SRC_PC1 0
452 #endif
453 #ifndef PULL_WAKEUP_SRC_PC2
454 #define PULL_WAKEUP_SRC_PC2 0
455 #endif
456 #ifndef PULL_WAKEUP_SRC_PC3
457 #define PULL_WAKEUP_SRC_PC3 0
458 #endif
459 #ifndef PULL_WAKEUP_SRC_PC4
460 #define PULL_WAKEUP_SRC_PC4 0
461 #endif
462 #ifndef PULL_WAKEUP_SRC_PC5
463 #define PULL_WAKEUP_SRC_PC5 0
464 #endif
465 #ifndef PULL_WAKEUP_SRC_PC6
466 #define PULL_WAKEUP_SRC_PC6 0
467 #endif
468 #ifndef PULL_WAKEUP_SRC_PC7
469 #define PULL_WAKEUP_SRC_PC7 0
470 #endif
471
472 //////////////////////////////////////////////////
473 #ifndef PD0_INPUT_ENABLE
474 #define PD0_INPUT_ENABLE 0
475 #endif
476 #ifndef PD1_INPUT_ENABLE
477 #define PD1_INPUT_ENABLE 0
478 #endif
479 #ifndef PD2_INPUT_ENABLE
480 #define PD2_INPUT_ENABLE 0
481 #endif
482 #ifndef PD3_INPUT_ENABLE
483 #define PD3_INPUT_ENABLE 0
484 #endif
485 #ifndef PD4_INPUT_ENABLE
486 #define PD4_INPUT_ENABLE 0
487 #endif
488 #ifndef PD5_INPUT_ENABLE
489 #define PD5_INPUT_ENABLE 0
490 #endif
491 #ifndef PD6_INPUT_ENABLE
492 #define PD6_INPUT_ENABLE 0
493 #endif
494 #ifndef PD7_INPUT_ENABLE
495 #define PD7_INPUT_ENABLE 0
496 #endif
497 #ifndef PD0_OUTPUT_ENABLE
498 #define PD0_OUTPUT_ENABLE 0
499 #endif
500 #ifndef PD1_OUTPUT_ENABLE
501 #define PD1_OUTPUT_ENABLE 0
502 #endif
503 #ifndef PD2_OUTPUT_ENABLE
504 #define PD2_OUTPUT_ENABLE 0
505 #endif
506 #ifndef PD3_OUTPUT_ENABLE
507 #define PD3_OUTPUT_ENABLE 0
508 #endif
509 #ifndef PD4_OUTPUT_ENABLE
510 #define PD4_OUTPUT_ENABLE 0
511 #endif
512 #ifndef PD5_OUTPUT_ENABLE
513 #define PD5_OUTPUT_ENABLE 0
514 #endif
515 #ifndef PD6_OUTPUT_ENABLE
516 #define PD6_OUTPUT_ENABLE 0
517 #endif
518 #ifndef PD7_OUTPUT_ENABLE
519 #define PD7_OUTPUT_ENABLE 0
520 #endif
521 #ifndef PD0_DATA_STRENGTH
522 #define PD0_DATA_STRENGTH 1
523 #endif
524 #ifndef PD1_DATA_STRENGTH
525 #define PD1_DATA_STRENGTH 1
526 #endif
527 #ifndef PD2_DATA_STRENGTH
528 #define PD2_DATA_STRENGTH 1
529 #endif
530 #ifndef PD3_DATA_STRENGTH
531 #define PD3_DATA_STRENGTH 1
532 #endif
533 #ifndef PD4_DATA_STRENGTH
534 #define PD4_DATA_STRENGTH 1
535 #endif
536 #ifndef PD5_DATA_STRENGTH
537 #define PD5_DATA_STRENGTH 1
538 #endif
539 #ifndef PD6_DATA_STRENGTH
540 #define PD6_DATA_STRENGTH 1
541 #endif
542 #ifndef PD7_DATA_STRENGTH
543 #define PD7_DATA_STRENGTH 1
544 #endif
545 #ifndef PD0_DATA_OUT
546 #define PD0_DATA_OUT 0
547 #endif
548 #ifndef PD1_DATA_OUT
549 #define PD1_DATA_OUT 0
550 #endif
551 #ifndef PD2_DATA_OUT
552 #define PD2_DATA_OUT 0
553 #endif
554 #ifndef PD3_DATA_OUT
555 #define PD3_DATA_OUT 0
556 #endif
557 #ifndef PD4_DATA_OUT
558 #define PD4_DATA_OUT 0
559 #endif
560 #ifndef PD5_DATA_OUT
561 #define PD5_DATA_OUT 0
562 #endif
563 #ifndef PD6_DATA_OUT
564 #define PD6_DATA_OUT 0
565 #endif
566 #ifndef PD7_DATA_OUT
567 #define PD7_DATA_OUT 0
568 #endif
569 #ifndef PD0_FUNC
570 #define PD0_FUNC AS_GPIO
571 #endif
572 #ifndef PD1_FUNC
573 #define PD1_FUNC AS_GPIO
574 #endif
575 #ifndef PD2_FUNC
576 #define PD2_FUNC AS_GPIO
577 #endif
578 #ifndef PD3_FUNC
579 #define PD3_FUNC AS_GPIO
580 #endif
581 #ifndef PD4_FUNC
582 #define PD4_FUNC AS_GPIO
583 #endif
584 #ifndef PD5_FUNC
585 #define PD5_FUNC AS_GPIO
586 #endif
587 #ifndef PD6_FUNC
588 #define PD6_FUNC AS_GPIO
589 #endif
590 #ifndef PD7_FUNC
591 #define PD7_FUNC AS_GPIO
592 #endif
593 #ifndef PULL_WAKEUP_SRC_PD0
594 #define PULL_WAKEUP_SRC_PD0 0
595 #endif
596 #ifndef PULL_WAKEUP_SRC_PD1
597 #define PULL_WAKEUP_SRC_PD1 0
598 #endif
599 #ifndef PULL_WAKEUP_SRC_PD2
600 #define PULL_WAKEUP_SRC_PD2 0
601 #endif
602 #ifndef PULL_WAKEUP_SRC_PD3
603 #define PULL_WAKEUP_SRC_PD3 0
604 #endif
605 #ifndef PULL_WAKEUP_SRC_PD4
606 #define PULL_WAKEUP_SRC_PD4 0
607 #endif
608 #ifndef PULL_WAKEUP_SRC_PD5
609 #define PULL_WAKEUP_SRC_PD5 0
610 #endif
611 #ifndef PULL_WAKEUP_SRC_PD6
612 #define PULL_WAKEUP_SRC_PD6 0
613 #endif
614 #ifndef PULL_WAKEUP_SRC_PD7
615 #define PULL_WAKEUP_SRC_PD7 0
616 #endif
617
618 //////////////////////////////////////////////////
619 #ifndef PE0_INPUT_ENABLE
620 #define PE0_INPUT_ENABLE 0
621 #endif
622 #ifndef PE1_INPUT_ENABLE
623 #define PE1_INPUT_ENABLE 0
624 #endif
625 #ifndef PE2_INPUT_ENABLE
626 #define PE2_INPUT_ENABLE 0
627 #endif
628 #ifndef PE3_INPUT_ENABLE
629 #define PE3_INPUT_ENABLE 0
630 #endif
631 #ifndef PE4_INPUT_ENABLE
632 #define PE4_INPUT_ENABLE 0
633 #endif
634 #ifndef PE5_INPUT_ENABLE
635 #define PE5_INPUT_ENABLE 0
636 #endif
637 #ifndef PE6_INPUT_ENABLE
638 #define PE6_INPUT_ENABLE 1
639 #endif
640 #ifndef PE7_INPUT_ENABLE
641 #define PE7_INPUT_ENABLE 1
642 #endif
643
644 #ifndef PE0_OUTPUT_ENABLE
645 #define PE0_OUTPUT_ENABLE 0
646 #endif
647 #ifndef PE1_OUTPUT_ENABLE
648 #define PE1_OUTPUT_ENABLE 0
649 #endif
650 #ifndef PE2_OUTPUT_ENABLE
651 #define PE2_OUTPUT_ENABLE 0
652 #endif
653 #ifndef PE3_OUTPUT_ENABLE
654 #define PE3_OUTPUT_ENABLE 0
655 #endif
656 #ifndef PE4_OUTPUT_ENABLE
657 #define PE4_OUTPUT_ENABLE 0
658 #endif
659 #ifndef PE5_OUTPUT_ENABLE
660 #define PE5_OUTPUT_ENABLE 0
661 #endif
662 #ifndef PE6_OUTPUT_ENABLE
663 #define PE6_OUTPUT_ENABLE 0
664 #endif
665 #ifndef PE7_OUTPUT_ENABLE
666 #define PE7_OUTPUT_ENABLE 0
667 #endif
668
669 #ifndef PE0_DATA_STRENGTH
670 #define PE0_DATA_STRENGTH 1
671 #endif
672 #ifndef PE1_DATA_STRENGTH
673 #define PE1_DATA_STRENGTH 1
674 #endif
675 #ifndef PE2_DATA_STRENGTH
676 #define PE2_DATA_STRENGTH 1
677 #endif
678 #ifndef PE3_DATA_STRENGTH
679 #define PE3_DATA_STRENGTH 1
680 #endif
681 #ifndef PE4_DATA_STRENGTH
682 #define PE4_DATA_STRENGTH 1
683 #endif
684 #ifndef PE5_DATA_STRENGTH
685 #define PE5_DATA_STRENGTH 1
686 #endif
687 #ifndef PE6_DATA_STRENGTH
688 #define PE6_DATA_STRENGTH 1
689 #endif
690 #ifndef PE7_DATA_STRENGTH
691 #define PE7_DATA_STRENGTH 1
692 #endif
693
694 #ifndef PE0_DATA_OUT
695 #define PE0_DATA_OUT 0
696 #endif
697 #ifndef PE1_DATA_OUT
698 #define PE1_DATA_OUT 0
699 #endif
700 #ifndef PE2_DATA_OUT
701 #define PE2_DATA_OUT 0
702 #endif
703 #ifndef PE3_DATA_OUT
704 #define PE3_DATA_OUT 0
705 #endif
706 #ifndef PE4_DATA_OUT
707 #define PE4_DATA_OUT 0
708 #endif
709 #ifndef PE5_DATA_OUT
710 #define PE5_DATA_OUT 0
711 #endif
712 #ifndef PE6_DATA_OUT
713 #define PE6_DATA_OUT 0
714 #endif
715 #ifndef PE7_DATA_OUT
716 #define PE7_DATA_OUT 0
717 #endif
718
719 #ifndef PE0_FUNC
720 #define PE0_FUNC AS_GPIO
721 #endif
722 #ifndef PE1_FUNC
723 #define PE1_FUNC AS_GPIO
724 #endif
725 #ifndef PE2_FUNC
726 #define PE2_FUNC AS_GPIO
727 #endif
728 #ifndef PE3_FUNC
729 #define PE3_FUNC AS_GPIO
730 #endif
731 #ifndef PE4_FUNC
732 #define PE4_FUNC AS_GPIO
733 #endif
734 #ifndef PE5_FUNC
735 #define PE5_FUNC AS_GPIO
736 #endif
737 #ifndef PE6_FUNC
738 #define PE6_FUNC AS_TMS
739 #endif
740 #ifndef PE7_FUNC
741 #define PE7_FUNC AS_TCK
742 #endif
743 #ifndef PULL_WAKEUP_SRC_PE0
744 #define PULL_WAKEUP_SRC_PE0 0
745 #endif
746 #ifndef PULL_WAKEUP_SRC_PE1
747 #define PULL_WAKEUP_SRC_PE1 0
748 #endif
749 #ifndef PULL_WAKEUP_SRC_PE2
750 #define PULL_WAKEUP_SRC_PE2 0
751 #endif
752 #ifndef PULL_WAKEUP_SRC_PE3
753 #define PULL_WAKEUP_SRC_PE3 0
754 #endif
755 #ifndef PULL_WAKEUP_SRC_PE4
756 #define PULL_WAKEUP_SRC_PE4 0
757 #endif
758 #ifndef PULL_WAKEUP_SRC_PE5
759 #define PULL_WAKEUP_SRC_PE5 0
760 #endif
761 #ifndef PULL_WAKEUP_SRC_PE6
762 #define PULL_WAKEUP_SRC_PE6 0
763 #endif
764 #ifndef PULL_WAKEUP_SRC_PE7
765 #define PULL_WAKEUP_SRC_PE7 0
766 #endif
767 //////////////////////////////////////////////////
768 #ifndef PF0_INPUT_ENABLE
769 #define PF0_INPUT_ENABLE 1 //MSPI
770 #endif
771 #ifndef PF1_INPUT_ENABLE
772 #define PF1_INPUT_ENABLE 1 //MSPI
773 #endif
774 #ifndef PF2_INPUT_ENABLE
775 #define PF2_INPUT_ENABLE 1 //MSPI
776 #endif
777 #ifndef PF3_INPUT_ENABLE
778 #define PF3_INPUT_ENABLE 1 //MSPI
779 #endif
780 #ifndef PF4_INPUT_ENABLE
781 #define PF4_INPUT_ENABLE 1 //MSPI
782 #endif
783 #ifndef PF5_INPUT_ENABLE
784 #define PF5_INPUT_ENABLE 1 //MSPI
785 #endif
786 #ifndef PF0_OUTPUT_ENABLE
787 #define PF0_OUTPUT_ENABLE 0
788 #endif
789 #ifndef PF1_OUTPUT_ENABLE
790 #define PF1_OUTPUT_ENABLE 0
791 #endif
792 #ifndef PF2_OUTPUT_ENABLE
793 #define PF2_OUTPUT_ENABLE 0
794 #endif
795 #ifndef PF3_OUTPUT_ENABLE
796 #define PF3_OUTPUT_ENABLE 0
797 #endif
798 #ifndef PF4_OUTPUT_ENABLE
799 #define PF4_OUTPUT_ENABLE 0
800 #endif
801 #ifndef PF5_OUTPUT_ENABLE
802 #define PF5_OUTPUT_ENABLE 0
803 #endif
804
805 #ifndef PF0_DATA_STRENGTH
806 #define PF0_DATA_STRENGTH 1
807 #endif
808 #ifndef PF1_DATA_STRENGTH
809 #define PF1_DATA_STRENGTH 1
810 #endif
811 #ifndef PF2_DATA_STRENGTH
812 #define PF2_DATA_STRENGTH 1
813 #endif
814 #ifndef PF3_DATA_STRENGTH
815 #define PF3_DATA_STRENGTH 1
816 #endif
817 #ifndef PF4_DATA_STRENGTH
818 #define PF4_DATA_STRENGTH 1
819 #endif
820 #ifndef PF5_DATA_STRENGTH
821 #define PF5_DATA_STRENGTH 1
822 #endif
823
824 #ifndef PF0_DATA_OUT
825 #define PF0_DATA_OUT 0
826 #endif
827 #ifndef PF1_DATA_OUT
828 #define PF1_DATA_OUT 0
829 #endif
830 #ifndef PF2_DATA_OUT
831 #define PF2_DATA_OUT 0
832 #endif
833 #ifndef PF3_DATA_OUT
834 #define PF3_DATA_OUT 0
835 #endif
836 #ifndef PF4_DATA_OUT
837 #define PF4_DATA_OUT 0
838 #endif
839 #ifndef PF5_DATA_OUT
840 #define PF5_DATA_OUT 0
841 #endif
842
843 #ifndef PF0_FUNC
844 #define PF0_FUNC AS_MSPI
845 #endif
846 #ifndef PF1_FUNC
847 #define PF1_FUNC AS_MSPI
848 #endif
849 #ifndef PF2_FUNC
850 #define PF2_FUNC AS_MSPI
851 #endif
852 #ifndef PF3_FUNC
853 #define PF3_FUNC AS_MSPI
854 #endif
855 #ifndef PF4_FUNC
856 #define PF4_FUNC AS_MSPI
857 #endif
858 #ifndef PF5_FUNC
859 #define PF5_FUNC AS_MSPI
860 #endif
861
862 /**
863 * @brief This function servers to initiate pull up-down resistor of all gpio.
864 * @param[in] none
865 * @return none.
866 * @attention Processing methods of unused GPIO
867 * Set it to high resistance state and set it to open pull-up or pull-down resistance to
868 * let it be in the determined state.When GPIO uses internal pull-up or pull-down resistance,
869 * do not use pull-up or pull-down resistance on the board in the process of practical
870 * application because it may have the risk of electric leakage .
871 */
gpio_analog_resistance_init(void)872 static inline void gpio_analog_resistance_init(void)
873 {
874 //A<3:0>
875 analog_write_reg8 (0x0e, PULL_WAKEUP_SRC_PA0 |
876 (PULL_WAKEUP_SRC_PA1<<2) |
877 (PULL_WAKEUP_SRC_PA2<<4) |
878 (PULL_WAKEUP_SRC_PA3<<6));
879 //A<7:4>
880 analog_write_reg8 (0x0f, PULL_WAKEUP_SRC_PA4 |
881 (PULL_WAKEUP_SRC_PA5<<2) |
882 (PULL_WAKEUP_SRC_PA6<<4) |
883 (PULL_WAKEUP_SRC_PA7<<6));
884 //B<3:0>
885 analog_write_reg8 (0x10, PULL_WAKEUP_SRC_PB0 |
886 (PULL_WAKEUP_SRC_PB1<<2) |
887 (PULL_WAKEUP_SRC_PB2<<4) |
888 (PULL_WAKEUP_SRC_PB3<<6));
889 //B<7:4>
890 analog_write_reg8 (0x11, PULL_WAKEUP_SRC_PB4 |
891 (PULL_WAKEUP_SRC_PB5<<2) |
892 (PULL_WAKEUP_SRC_PB6<<4) |
893 (PULL_WAKEUP_SRC_PB7<<6));
894
895 //C<3:0>
896 analog_write_reg8 (0x12, PULL_WAKEUP_SRC_PC0 |
897 (PULL_WAKEUP_SRC_PC1<<2) |
898 (PULL_WAKEUP_SRC_PC2<<4) |
899 (PULL_WAKEUP_SRC_PC3<<6));
900 //C<7:4>
901 analog_write_reg8 (0x13, PULL_WAKEUP_SRC_PC4 |
902 (PULL_WAKEUP_SRC_PC5<<2) |
903 (PULL_WAKEUP_SRC_PC6<<4) |
904 (PULL_WAKEUP_SRC_PC7<<6));
905
906 //D<3:0>
907 analog_write_reg8 (0x14, PULL_WAKEUP_SRC_PD0 |
908 (PULL_WAKEUP_SRC_PD1<<2) |
909 (PULL_WAKEUP_SRC_PD2<<4) |
910 (PULL_WAKEUP_SRC_PD3<<6));
911 //D<7:4>
912 analog_write_reg8 (0x15, PULL_WAKEUP_SRC_PD4 |
913 (PULL_WAKEUP_SRC_PD5<<2) |
914 (PULL_WAKEUP_SRC_PD6<<4) |
915 (PULL_WAKEUP_SRC_PD7<<6));
916 //E<3:0>
917 analog_write_reg8 (0x16, PULL_WAKEUP_SRC_PE0 |
918 (PULL_WAKEUP_SRC_PE1<<2) |
919 (PULL_WAKEUP_SRC_PE2<<4) |
920 (PULL_WAKEUP_SRC_PE3<<6));
921 //E<7:4>
922 analog_write_reg8 (0x17, PULL_WAKEUP_SRC_PE4 |
923 (PULL_WAKEUP_SRC_PE5<<2) |
924 (PULL_WAKEUP_SRC_PE6<<4) |
925 (PULL_WAKEUP_SRC_PE7<<6));
926 }
927
928
929 _attribute_ram_code_sec_
gpio_init(int anaRes_init_en)930 static inline void gpio_init(int anaRes_init_en)
931 {
932 //PA group
933 reg_gpio_pa_setting1 =
934 (PA0_INPUT_ENABLE<<8) | (PA1_INPUT_ENABLE<<9) | (PA2_INPUT_ENABLE<<10) | (PA3_INPUT_ENABLE<<11) |
935 (PA4_INPUT_ENABLE<<12) | (PA5_INPUT_ENABLE<<13) | (PA6_INPUT_ENABLE<<14) | (PA7_INPUT_ENABLE<<15) |
936 ((PA0_OUTPUT_ENABLE?0:1)<<16) | ((PA1_OUTPUT_ENABLE?0:1)<<17) | ((PA2_OUTPUT_ENABLE?0:1)<<18) | ((PA3_OUTPUT_ENABLE?0:1)<<19) |
937 ((PA4_OUTPUT_ENABLE?0:1)<<20) | ((PA5_OUTPUT_ENABLE?0:1)<<21) | ((PA6_OUTPUT_ENABLE?0:1)<<22) | ((PA7_OUTPUT_ENABLE?0:1)<<23) |
938 (PA0_DATA_OUT<<24) | (PA1_DATA_OUT<<25) | (PA2_DATA_OUT<<26) | (PA3_DATA_OUT<<27) |
939 (PA4_DATA_OUT<<28) | (PA5_DATA_OUT<<29) | (PA6_DATA_OUT<<30) | (PA7_DATA_OUT<<31) ;
940 reg_gpio_pa_setting2 =
941 (PA0_DATA_STRENGTH<<8) | (PA1_DATA_STRENGTH<<9)| (PA2_DATA_STRENGTH<<10) | (PA3_DATA_STRENGTH<<11) |
942 (PA4_DATA_STRENGTH<<12) | (PA5_DATA_STRENGTH<<13) | (PA6_DATA_STRENGTH<<14) | (PA7_DATA_STRENGTH<<15) |
943 (PA0_FUNC==AS_GPIO ? BIT(16):0) | (PA1_FUNC==AS_GPIO ? BIT(17):0)| (PA2_FUNC==AS_GPIO ? BIT(18):0)| (PA3_FUNC==AS_GPIO ? BIT(19):0) |
944 (PA4_FUNC==AS_GPIO ? BIT(20):0) | (PA5_FUNC==AS_GPIO ? BIT(21):0)| (PA6_FUNC==AS_GPIO ? BIT(22):0)| (PA7_FUNC==AS_GPIO ? BIT(23):0);
945
946 //PB group
947 reg_gpio_pb_setting1 =
948 (PB0_INPUT_ENABLE<<8) | (PB1_INPUT_ENABLE<<9) | (PB2_INPUT_ENABLE<<10) | (PB3_INPUT_ENABLE<<11) |
949 (PB4_INPUT_ENABLE<<12) | (PB5_INPUT_ENABLE<<13) | (PB6_INPUT_ENABLE<<14) | (PB7_INPUT_ENABLE<<15) |
950 ((PB0_OUTPUT_ENABLE?0:1)<<16) | ((PB1_OUTPUT_ENABLE?0:1)<<17) | ((PB2_OUTPUT_ENABLE?0:1)<<18) | ((PB3_OUTPUT_ENABLE?0:1)<<19) |
951 ((PB4_OUTPUT_ENABLE?0:1)<<20) | ((PB5_OUTPUT_ENABLE?0:1)<<21) | ((PB6_OUTPUT_ENABLE?0:1)<<22) | ((PB7_OUTPUT_ENABLE?0:1)<<23) |
952 (PB0_DATA_OUT<<24) | (PB1_DATA_OUT<<25) | (PB2_DATA_OUT<<26) | (PB3_DATA_OUT<<27) |
953 (PB4_DATA_OUT<<28) | (PB5_DATA_OUT<<29) | (PB6_DATA_OUT<<30) | (PB7_DATA_OUT<<31) ;
954 reg_gpio_pb_setting2 =
955 (PB0_DATA_STRENGTH<<8) | (PB1_DATA_STRENGTH<<9)| (PB2_DATA_STRENGTH<<10) | (PB3_DATA_STRENGTH<<11) |
956 (PB4_DATA_STRENGTH<<12) | (PB5_DATA_STRENGTH<<13) | (PB6_DATA_STRENGTH<<14) | (PB7_DATA_STRENGTH<<15) |
957 (PB0_FUNC==AS_GPIO ? BIT(16):0) | (PB1_FUNC==AS_GPIO ? BIT(17):0)| (PB2_FUNC==AS_GPIO ? BIT(18):0)| (PB3_FUNC==AS_GPIO ? BIT(19):0) |
958 (PB4_FUNC==AS_GPIO ? BIT(20):0) | (PB5_FUNC==AS_GPIO ? BIT(21):0)| (PB6_FUNC==AS_GPIO ? BIT(22):0)| (PB7_FUNC==AS_GPIO ? BIT(23):0);
959
960 //PC group
961 //ie
962 analog_write_reg8(areg_gpio_pc_ie, (PC0_INPUT_ENABLE<<0) | (PC1_INPUT_ENABLE<<1) | (PC2_INPUT_ENABLE<<2) | (PC3_INPUT_ENABLE<<3) |
963 (PC4_INPUT_ENABLE<<4) | (PC5_INPUT_ENABLE<<5) | (PC6_INPUT_ENABLE<<6) | (PC7_INPUT_ENABLE<<7) );
964
965 //oen
966 reg_gpio_pc_oen =
967 ((PC0_OUTPUT_ENABLE?0:1)<<0) | ((PC1_OUTPUT_ENABLE?0:1)<<1) | ((PC2_OUTPUT_ENABLE?0:1)<<2) | ((PC3_OUTPUT_ENABLE?0:1)<<3) |
968 ((PC4_OUTPUT_ENABLE?0:1)<<4) | ((PC5_OUTPUT_ENABLE?0:1)<<5) | ((PC6_OUTPUT_ENABLE?0:1)<<6) | ((PC7_OUTPUT_ENABLE?0:1)<<7);
969 //dataO
970 reg_gpio_pc_out =
971 (PC0_DATA_OUT<<0) | (PC1_DATA_OUT<<1) | (PC2_DATA_OUT<<2) | (PC3_DATA_OUT<<3) |
972 (PC4_DATA_OUT<<4) | (PC5_DATA_OUT<<5) | (PC6_DATA_OUT<<6) | (PC7_DATA_OUT<<7) ;
973
974 //ds
975 analog_write_reg8(areg_gpio_pc_ds, (PC0_DATA_STRENGTH<<0) | (PC1_DATA_STRENGTH<<1) | (PC2_DATA_STRENGTH<<2) | (PC3_DATA_STRENGTH<<3) |
976 (PC4_DATA_STRENGTH<<4) | (PC5_DATA_STRENGTH<<5) | (PC6_DATA_STRENGTH<<6) | (PC7_DATA_STRENGTH<<7) );
977
978 reg_gpio_pc_gpio =
979 (PC0_FUNC==AS_GPIO ? BIT(0):0) | (PC1_FUNC==AS_GPIO ? BIT(1):0)| (PC2_FUNC==AS_GPIO ? BIT(2):0)| (PC3_FUNC==AS_GPIO ? BIT(3):0) |
980 (PC4_FUNC==AS_GPIO ? BIT(4):0) | (PC5_FUNC==AS_GPIO ? BIT(5):0)| (PC6_FUNC==AS_GPIO ? BIT(6):0)| (PC7_FUNC==AS_GPIO ? BIT(7):0);
981
982 //PD group
983 //ie
984 analog_write_reg8(areg_gpio_pd_ie, (PD0_INPUT_ENABLE<<0) | (PD1_INPUT_ENABLE<<1) | (PD2_INPUT_ENABLE<<2) | (PD3_INPUT_ENABLE<<3) |
985 (PD4_INPUT_ENABLE<<4) | (PD5_INPUT_ENABLE<<5) | (PD6_INPUT_ENABLE<<6) | (PD7_INPUT_ENABLE<<7) );
986
987 //oen
988 reg_gpio_pd_oen =
989 ((PD0_OUTPUT_ENABLE?0:1)<<0) | ((PD1_OUTPUT_ENABLE?0:1)<<1) | ((PD2_OUTPUT_ENABLE?0:1)<<2) | ((PD3_OUTPUT_ENABLE?0:1)<<3) |
990 ((PD4_OUTPUT_ENABLE?0:1)<<4) | ((PD5_OUTPUT_ENABLE?0:1)<<5) | ((PD6_OUTPUT_ENABLE?0:1)<<6) | ((PD7_OUTPUT_ENABLE?0:1)<<7);
991 //dataO
992 reg_gpio_pd_out =
993 (PD0_DATA_OUT<<0) | (PD1_DATA_OUT<<1) | (PD2_DATA_OUT<<2) | (PD3_DATA_OUT<<3) |
994 (PD4_DATA_OUT<<4) | (PD5_DATA_OUT<<5) | (PD6_DATA_OUT<<6) | (PD7_DATA_OUT<<7) ;
995
996 //ds
997 analog_write_reg8(areg_gpio_pd_ds, (PD0_DATA_STRENGTH<<0) | (PD1_DATA_STRENGTH<<1) | (PD2_DATA_STRENGTH<<2) | (PD3_DATA_STRENGTH<<3) |
998 (PD4_DATA_STRENGTH<<4) | (PD5_DATA_STRENGTH<<5) | (PD6_DATA_STRENGTH<<6) | (PD7_DATA_STRENGTH<<7) );
999
1000 reg_gpio_pd_gpio =
1001 (PD0_FUNC==AS_GPIO ? BIT(0):0) | (PD1_FUNC==AS_GPIO ? BIT(1):0)| (PD2_FUNC==AS_GPIO ? BIT(2):0)| (PD3_FUNC==AS_GPIO ? BIT(3):0) |
1002 (PD4_FUNC==AS_GPIO ? BIT(4):0) | (PD5_FUNC==AS_GPIO ? BIT(5):0)| (PD6_FUNC==AS_GPIO ? BIT(6):0)| (PD7_FUNC==AS_GPIO ? BIT(7):0);
1003
1004 //PE group
1005 reg_gpio_pe_setting1 =
1006 (PE0_INPUT_ENABLE<<8) | (PE1_INPUT_ENABLE<<9) | (PE2_INPUT_ENABLE<<10) | (PE3_INPUT_ENABLE<<11) |
1007 (PE4_INPUT_ENABLE<<12) | (PE5_INPUT_ENABLE<<13)| (PE6_INPUT_ENABLE<<14) | (PE7_INPUT_ENABLE<<15) |
1008 ((PE0_OUTPUT_ENABLE?0:1)<<16) | ((PE1_OUTPUT_ENABLE?0:1)<<17) | ((PE2_OUTPUT_ENABLE?0:1)<<18) | ((PE3_OUTPUT_ENABLE?0:1)<<19) |
1009 ((PE4_OUTPUT_ENABLE?0:1)<<20) | ((PE5_OUTPUT_ENABLE?0:1)<<21) | ((PE6_OUTPUT_ENABLE?0:1)<<22) | ((PE7_OUTPUT_ENABLE?0:1)<<23) |
1010 (PE0_DATA_OUT<<24) | (PE1_DATA_OUT<<25) | (PE2_DATA_OUT<<26) | (PE3_DATA_OUT<<27) |
1011 (PE4_DATA_OUT<<28) | (PE5_DATA_OUT<<29) | (PE6_DATA_OUT<<30) | (PE7_DATA_OUT<<31) ;
1012 reg_gpio_pe_setting2 =
1013 (PE0_DATA_STRENGTH<<8) | (PE1_DATA_STRENGTH<<9) | (PE2_DATA_STRENGTH<<10) | (PE3_DATA_STRENGTH<<11) |
1014 (PE4_DATA_STRENGTH<<12) | (PE5_DATA_STRENGTH<<13) | (PE6_DATA_STRENGTH<<14) | (PE7_DATA_STRENGTH<<15) |
1015 (PE0_FUNC==AS_GPIO ? BIT(16):0) | (PE1_FUNC==AS_GPIO ? BIT(17):0)| (PE2_FUNC==AS_GPIO ? BIT(18):0)| (PE3_FUNC==AS_GPIO ? BIT(19):0) |
1016 (PE4_FUNC==AS_GPIO ? BIT(20):0) | (PE5_FUNC==AS_GPIO ? BIT(21):0)| (PE6_FUNC==AS_GPIO ? BIT(22):0)| (PE7_FUNC==AS_GPIO ? BIT(23):0);
1017
1018 if(anaRes_init_en)
1019 {
1020 gpio_analog_resistance_init();
1021 }
1022 }
1023
1024 #endif /* DRIVERS_GPIO_SETTING_H_ */
1025
1026
