Searched refs:REG_ADDR16 (Results 1 – 12 of 12) sorted by relevance
123 #define reg_tx_wptr REG_ADDR16(REG_AUDIO_APB_BASE+0x20)124 #define reg_tx_rptr REG_ADDR16(REG_AUDIO_APB_BASE+0x22)126 #define reg_tx_max REG_ADDR16(REG_AUDIO_APB_BASE+0x26)128 #define reg_rx_rptr REG_ADDR16(REG_AUDIO_APB_BASE+0x2a)129 #define reg_rx_wptr REG_ADDR16(REG_AUDIO_APB_BASE+0x28)131 #define reg_rx_max REG_ADDR16(REG_AUDIO_APB_BASE+0x2e)133 #define reg_th0_h1 REG_ADDR16(REG_AUDIO_APB_BASE+0x30)//tx134 #define reg_th0_l1 REG_ADDR16(REG_AUDIO_APB_BASE+0x32)//tx136 #define reg_th0_h2 REG_ADDR16(REG_AUDIO_APB_BASE+0x38)//tx137 #define reg_th0_l2 REG_ADDR16(REG_AUDIO_APB_BASE+0x3a)//tx[all …]
149 #define reg_pwm_cmp(i) REG_ADDR16(REG_PWM_BASE+0x14 +(i << 2))168 #define reg_pwm_max(i) REG_ADDR16(REG_PWM_BASE+0x16 + (i << 2))238 #define reg_pwm_cnt(i) REG_ADDR16(REG_PWM_BASE+0x34 +(i << 1))256 #define reg_pwm_tcmp0_shadow REG_ADDR16(REG_PWM_BASE+0x44)262 #define reg_pwm_tmax0_shadow REG_ADDR16(REG_PWM_BASE+0x46)268 #define reg_pwm_ir_fifo_dat(i) REG_ADDR16(REG_PWM_BASE+0x48+i*2)
44 #define reg_gpio_pa_fs REG_ADDR16(0x140330)61 #define reg_gpio_pb_fs REG_ADDR16(0x140332)79 #define reg_gpio_pc_fs REG_ADDR16(0x140334)97 #define reg_gpio_pd_fs REG_ADDR16(0x140336)114 #define reg_gpio_pe_fs REG_ADDR16(0x140350)129 #define reg_gpio_pf_fs REG_ADDR16(0x140356)
36 #define reg_uart_data_hword_buf(i,j) REG_ADDR16(reg_uart_data_buf_adr(i)+(j)*2)40 #define reg_uart_clk_div(i) REG_ADDR16(0x140084+(i)*0x40)68 #define reg_uart_ctrl2(i) REG_ADDR16(0x140088+(i)*0x40)
71 #define reg_usb_cycl_cali REG_ADDR16(0x100806)72 #define reg_usb_cych_cali REG_ADDR16(0x100807)201 #define reg_usb_mic_dat0 REG_ADDR16(0x1800)202 #define reg_usb_mic_dat1 REG_ADDR16(0x1802)
64 #define reg_mspi_xip_config REG_ADDR16(0x140106)
47 #define reg_ana_addr_data16 REG_ADDR16(ALG_BASE_ADDR+0x04)
33 #define reg_tmr_ctrl16 REG_ADDR16(0x140140)
504 #define reg_rf_ll_tx_stl REG_ADDR16(REG_BB_LL_BASE_ADDR+0x04)526 #define reg_rf_rx_timeout REG_ADDR16(REG_BB_LL_BASE_ADDR+0x0a)595 #define reg_rf_irq_mask REG_ADDR16(REG_BB_LL_BASE_ADDR+0x1c)611 #define reg_rf_irq_status REG_ADDR16(REG_BB_LL_BASE_ADDR+0x20)
71 #define REG_ADDR16(a) (*(volatile unsigned short*)(REG_RW_BASE_ADDR | (a))) macro
338 REG_ADDR16(0x80140a04) = txstl_us; in rf_tx_settle_us()
69 REG_ADDR16(0x80140a04) = txstl_us; in rf_tx_settle_adjust()
