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Searched refs:BM_SET (Results 1 – 16 of 16) sorted by relevance

/hal_telink-latest/tlsr9/drivers/B91/
Dgpio.c75 BM_SET(reg_gpio_ie(pin), bit); in gpio_input_en()
147 {BM_SET(reg_gpio_ds(pin), bit);} in gpio_ds_en()
261 BM_SET(reg_gpio_pol(pin), pin & 0xff); in gpio_set_irq()
266 BM_SET(reg_gpio_irq_risc_mask, FLD_GPIO_IRQ_LVL_GPIO); in gpio_set_irq()
269 BM_SET(reg_gpio_pol(pin), pin & 0xff); in gpio_set_irq()
270 BM_SET(reg_gpio_irq_risc_mask, FLD_GPIO_IRQ_LVL_GPIO); in gpio_set_irq()
275 BM_SET(reg_gpio_irq_risc_mask, FLD_GPIO_IRQ_MASK_GPIO); in gpio_set_irq()
295 BM_SET(reg_gpio_pol(pin), pin & 0xff); in gpio_set_gpio2risc0_irq()
300 BM_SET(reg_gpio_irq_risc_mask, FLD_GPIO_IRQ_LVL_GPIO2RISC0); in gpio_set_gpio2risc0_irq()
303 BM_SET(reg_gpio_pol(pin), pin & 0xff); in gpio_set_gpio2risc0_irq()
[all …]
Dpwm.h217 BM_SET(reg_pwm0_enable, BIT(0)); in pwm_start()
220 BM_SET(reg_pwm_enable, BIT(id)); in pwm_start()
286 BM_SET(reg_pwm_pol, BIT(id)); in pwm_set_polarity_en()
309 BM_SET(reg_pwm_irq_mask(1), BIT(0)); in pwm_set_irq_mask()
313 BM_SET(reg_pwm_irq_mask(0), mask); in pwm_set_irq_mask()
328 BM_SET(reg_pwm_irq_mask(1), BIT(0)); in pwm_clr_irq_mask()
332 BM_SET(reg_pwm_irq_mask(0), mask); in pwm_clr_irq_mask()
366 BM_SET(reg_pwm_irq_sta(1), BIT(0)); in pwm_clr_irq_status()
370 BM_SET(reg_pwm_irq_sta(0), status); in pwm_clr_irq_status()
Dspi.h413 BM_SET(reg_spi_fifo_state(spi_sel), FLD_SPI_TXF_CLR); in spi_tx_fifo_clr()
423 BM_SET(reg_spi_fifo_state(spi_sel), FLD_SPI_RXF_CLR); in spi_rx_fifo_clr()
444 BM_SET( reg_spi_mode2(spi_sel), FLD_SPI_CMD_EN); in spi_cmd_en()
464 BM_SET( reg_spi_mode2(HSPI_MODULE), FLD_HSPI_CMD_FMT); in hspi_cmd_fmt_en()
482 BM_SET(reg_spi_mode2(HSPI_MODULE), FLD_HSPI_QUAD); in hspi_quad_mode_en()
502 BM_SET(reg_spi_mode0(spi_sel), FLD_SPI_DUAL); in spi_dual_mode_en()
522 BM_SET(reg_spi_mode0(spi_sel), FLD_SPI_3LINE); in spi_3line_mode_en()
541 BM_SET(reg_hspi_xip_ctrl, FLD_HSPI_ADDR_FMT); in hspi_addr_fmt_en()
573 BM_SET(reg_spi_trans2(spi_sel), FLD_SPI_TX_DMA_EN); in spi_tx_dma_en()
593 BM_SET(reg_spi_trans2(spi_sel), FLD_SPI_RX_DMA_EN); in spi_rx_dma_en()
[all …]
Dpke.h175 BM_SET(reg_pke_conf, mask); in pke_set_irq_mask()
214 BM_SET(reg_pke_ctrl, FLD_PKE_CTRL_START); in pke_opr_start()
238 BM_SET(reg_pke_conf, GET_WORD_LEN(bitLen)<<16); in pke_set_operand_width()
240 BM_SET(reg_pke_conf, 2<<24); in pke_set_operand_width()
Dgpio.h186 BM_SET(reg_gpio_func(pin), bit); in gpio_function_en()
211 BM_SET(reg_gpio_out(pin), bit); in gpio_set_high_level()
305 BM_SET(reg_gpio_oen(pin), bit); in gpio_output_dis()
355 BM_SET(reg_gpio_irq_en(pin), pin & 0xff); in gpio_irq_en()
375 BM_SET(reg_gpio_irq_risc0_en(pin), pin & 0xff); in gpio_gpio2risc0_irq_en()
393 BM_SET(reg_gpio_irq_risc1_en(pin), pin & 0xff); in gpio_gpio2risc1_irq_en()
Dwatchdog.h38 BM_SET(reg_tmr_ctrl2, FLD_TMR_WD_EN); in wd_start()
Dusbhw.c35 BM_SET(reg_ctrl_ep_irq_mode, m); in usbhw_disable_manual_interrupt()
Daudio.c619 BM_SET(reg_audio_codec_dac_ctr,FLD_AUDIO_CODEC_DAC_SOFT_MUTE); //dac mute in audio_codec_dac_config()
623 BM_SET(reg_audio_codec_dac_ctr,FLD_AUDIO_CODEC_DAC_LEFT_ONLY); //active left channel only in audio_codec_dac_config()
714 BM_SET(reg_audio_codec_adc12_ctr,FLD_AUDIO_CODEC_ADC12_SOFT_MUTE); /*adc mute*/ in audio_codec_adc_config()
1131 BM_SET(reg_audio_codec_dac_ctr,FLD_AUDIO_CODEC_DAC_SOFT_MUTE);//dac mute in audio_pause_out_path()
1163 BM_SET(reg_audio_codec_dac_ctr,FLD_AUDIO_CODEC_DAC_SOFT_MUTE); in audio_codec_dac_power_down()
1165 BM_SET(reg_audio_codec_dac_itf_ctr,FLD_AUDIO_CODEC_DAC_ITF_SB); in audio_codec_dac_power_down()
1166 BM_SET(reg_audio_codec_dac_ctr,FLD_AUDIO_CODEC_DAC_SB); in audio_codec_dac_power_down()
1168 BM_SET(reg_audio_codec_vic_ctr,FLD_AUDIO_CODEC_SLEEP_ANALOG); in audio_codec_dac_power_down()
1183 BM_SET(reg_audio_codec_vic_ctr,FLD_AUDIO_CODEC_SLEEP_ANALOG); in audio_codec_dac_power_on()
1201 BM_SET(reg_audio_codec_adc12_ctr,FLD_AUDIO_CODEC_ADC12_SOFT_MUTE); in audio_codec_adc_power_down()
[all …]
Dswire.h95 BM_SET(reg_swire_id, FLD_SWIRE_FIFO_MODE); in swire_fifo_mode_en()
Di2c.c213 BM_SET(reg_i2c_status,FLD_I2C_TX_CLR);//clear index in i2c_master_write()
255 BM_SET(reg_i2c_status,FLD_I2C_RX_CLR);//clear index in i2c_master_read()
293 BM_SET(reg_i2c_status,FLD_I2C_TX_CLR);//clear index in i2c_master_write_read()
321 BM_SET(reg_i2c_status,FLD_I2C_RX_CLR);//clear index in i2c_master_write_read()
Daudio.h453 BM_SET(reg_i2s_step,FLD_I2S_CLK_EN); in audio_i2s_clk_en()
472 BM_SET(reg_dmic_step,FLD_DMIC_SEL); in audio_codec_clk_en()
616 BM_SET(reg_i2s_cfg,FLD_AUDIO_I2S_LRSWAP); in audio_invert_data_en()
Dusbhw.h65 BM_SET(reg_usb_ep8_fifo_mode,FLD_USB_ENP8_FIFO_MODE); in usbhw_set_ep8_fifo_mode()
Ddma.h167 BM_SET(reg_dma_ctr0(chn),BIT(0)); in dma_chn_en()
Drf.h290 BM_SET(reg_rf_irq_mask,mask); in rf_set_irq_mask()
Dpm.c465 BM_SET(reg_system_st,FLD_SYSTEM_CMD_STOP); //write 1, stop system timer when using auto mode in pm_sleep_wakeup()
/hal_telink-latest/tlsr9/common/
Dbit.h39 #define BM_SET(x, mask) ( (x) |= (mask) ) macro