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Searched refs:reg_dmic_clk_set (Results 1 – 2 of 2) sorted by relevance

/hal_telink-3.6.0-3.5.0-3.4.0/tlsr9/drivers/B91/reg_include/
Dsoc.h170 #define reg_dmic_clk_set REG_ADDR8(SC_BASE_ADDR+0x33) macro
/hal_telink-3.6.0-3.5.0-3.4.0/tlsr9/drivers/B91/
Daudio.h441 BM_CLR(reg_dmic_clk_set,BIT(0));//set dmic_div in audio_set_codec_clk()