Home
last modified time | relevance | path

Searched refs:PLL_DIV12_TO_CCLK (Results 1 – 1 of 1) sorted by relevance

/hal_telink-3.6.0-3.5.0-3.4.0/tlsr9/drivers/B91/
Dclock.h51 #define CCLK_16M_HCLK_16M_PCLK_16M clock_init(PLL_CLK_192M, PAD_PLL_DIV, PLL_DIV12_TO_CCLK, CCLK…
126 PLL_DIV12_TO_CCLK = 12, enumerator