Searched refs:reg_mpcbb (Results 1 – 4 of 4) sorted by relevance
1427 __IO uint32_t *reg_mpcbb; in HAL_GTZC_MPCBB_LockConfig() local1446 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB1_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1454 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB2_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1463 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB3_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1472 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB4_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1481 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB5_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1491 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB6_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1508 SET_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1512 CLEAR_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1527 reg_mpcbb++; in HAL_GTZC_MPCBB_LockConfig()[all …]
934 __IO uint32_t *reg_mpcbb; in HAL_GTZC_MPCBB_LockConfig() local954 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB1_S->CFGLOCK; in HAL_GTZC_MPCBB_LockConfig()963 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB2_S->CFGLOCK; in HAL_GTZC_MPCBB_LockConfig()973 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB6_S->CFGLOCK; in HAL_GTZC_MPCBB_LockConfig()988 SET_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()992 CLEAR_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1027 uint32_t reg_mpcbb; in HAL_GTZC_MPCBB_GetLockConfig() local1047 reg_mpcbb = GTZC_MPCBB1_S->CFGLOCK; in HAL_GTZC_MPCBB_GetLockConfig()1057 reg_mpcbb = GTZC_MPCBB2_S->CFGLOCK; in HAL_GTZC_MPCBB_GetLockConfig()1067 reg_mpcbb = GTZC_MPCBB6_S->CFGLOCK; in HAL_GTZC_MPCBB_GetLockConfig()[all …]
1286 __IO uint32_t *reg_mpcbb; in HAL_GTZC_MPCBB_LockConfig() local1306 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB1_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1315 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB2_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1324 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB3_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1340 SET_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1344 CLEAR_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1379 uint32_t reg_mpcbb; in HAL_GTZC_MPCBB_GetLockConfig() local1399 reg_mpcbb = GTZC_MPCBB1_S->CFGLOCKR1; in HAL_GTZC_MPCBB_GetLockConfig()1409 reg_mpcbb = GTZC_MPCBB2_S->CFGLOCKR1; in HAL_GTZC_MPCBB_GetLockConfig()1419 reg_mpcbb = GTZC_MPCBB3_S->CFGLOCKR1; in HAL_GTZC_MPCBB_GetLockConfig()[all …]
1010 __IO uint32_t *reg_mpcbb; in HAL_GTZC_MPCBB_LockConfig() local1029 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB1_S->LCKVTR1; in HAL_GTZC_MPCBB_LockConfig()1038 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB2_S->LCKVTR1; in HAL_GTZC_MPCBB_LockConfig()1053 SET_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1057 CLEAR_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1092 uint32_t reg_mpcbb; in HAL_GTZC_MPCBB_GetLockConfig() local1111 reg_mpcbb = GTZC_MPCBB1_S->LCKVTR1; in HAL_GTZC_MPCBB_GetLockConfig()1120 reg_mpcbb = GTZC_MPCBB2_S->LCKVTR1; in HAL_GTZC_MPCBB_GetLockConfig()1133 pLockAttributes[i] = (reg_mpcbb & (1UL << (offset_bit_start % 32U))) in HAL_GTZC_MPCBB_GetLockConfig()