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Searched refs:p_rcc_pll_cfgr3_reg (Results 1 – 2 of 2) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c2028 __IO uint32_t *p_rcc_pll_cfgr3_reg; in RCC_PLL_Config() local
2034 p_rcc_pll_cfgr3_reg = &(RCC->PLL1CFGR3) + (((uint32_t)0x4) * PLLnumber); in RCC_PLL_Config()
2063 SET_BIT(*p_rcc_pll_cfgr3_reg, RCC_PLL1CFGR3_PLL1MODSSDIS); in RCC_PLL_Config()
2072 MODIFY_REG(*p_rcc_pll_cfgr3_reg, (RCC_PLL1CFGR3_PLL1PDIV1 | RCC_PLL1CFGR3_PLL1PDIV2), \ in RCC_PLL_Config()
2080 CLEAR_BIT(*p_rcc_pll_cfgr3_reg, RCC_PLL1CFGR3_PLL1MODDSEN); in RCC_PLL_Config()
2086 SET_BIT(*p_rcc_pll_cfgr3_reg, (RCC_PLL1CFGR3_PLL1MODDSEN | RCC_PLL1CFGR3_PLL1DACEN)); in RCC_PLL_Config()
2090 SET_BIT(*p_rcc_pll_cfgr3_reg, (RCC_PLL1CFGR3_PLL1MODSSRST | RCC_PLL1CFGR3_PLL1PDIVEN)); in RCC_PLL_Config()
2141 CLEAR_BIT(*p_rcc_pll_cfgr3_reg, RCC_PLL1CFGR3_PLL1PDIVEN); in RCC_PLL_Config()
2207 __IO const uint32_t *p_rcc_pll_cfgr1_reg, *p_rcc_pll_cfgr2_reg, *p_rcc_pll_cfgr3_reg; in RCC_PLL_IsNewConfig() local
2214 p_rcc_pll_cfgr3_reg = &(RCC->PLL1CFGR3) + (((uint32_t)0x4) * PLLnumber); in RCC_PLL_IsNewConfig()
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Dstm32n6xx_hal_rcc_ex.c3146 __IO uint32_t *p_rcc_pll_cfgr3_reg; in HAL_RCCEx_PLLSSCGConfig() local
3152 p_rcc_pll_cfgr3_reg = &(RCC->PLL1CFGR3) + (((uint32_t)0x4) * PLLnumber); in HAL_RCCEx_PLLSSCGConfig()
3181 SET_BIT(*p_rcc_pll_cfgr3_reg, RCC_PLL1CFGR3_PLL1MODSSDIS); in HAL_RCCEx_PLLSSCGConfig()
3190 MODIFY_REG(*p_rcc_pll_cfgr3_reg, (RCC_PLL1CFGR3_PLL1PDIV1 | RCC_PLL1CFGR3_PLL1PDIV2), \ in HAL_RCCEx_PLLSSCGConfig()
3198 …MODIFY_REG(*p_rcc_pll_cfgr3_reg, (RCC_PLL1CFGR3_PLL1MODDIV | RCC_PLL1CFGR3_PLL1MODSPR | RCC_PLL1CF… in HAL_RCCEx_PLLSSCGConfig()
3204 …CLEAR_BIT(*p_rcc_pll_cfgr3_reg, RCC_PLL1CFGR3_PLL1MODSSDIS | RCC_PLL1CFGR3_PLL1MODDSEN | RCC_PLL1C… in HAL_RCCEx_PLLSSCGConfig()
3207 SET_BIT(*p_rcc_pll_cfgr3_reg, (RCC_PLL1CFGR3_PLL1MODSSRST | RCC_PLL1CFGR3_PLL1PDIVEN)); in HAL_RCCEx_PLLSSCGConfig()
3210 SET_BIT(*p_rcc_pll_cfgr3_reg, (RCC_PLL1CFGR3_PLL1MODDSEN | RCC_PLL1CFGR3_PLL1DACEN)); in HAL_RCCEx_PLLSSCGConfig()
3228 CLEAR_BIT(*p_rcc_pll_cfgr3_reg, RCC_PLL1CFGR3_PLL1MODSSRST); in HAL_RCCEx_PLLSSCGConfig()