Searched refs:gclconf (Results 1 – 2 of 2) sorted by relevance
1440 HAL_StatusTypeDef HAL_ETHEx_GetGCLRegisters(ETH_HandleTypeDef *heth, ETH_GCLConfigTypeDef *gclconf) in HAL_ETHEx_GetGCLRegisters() argument1454 gclconf->BaseTimeRegister = (uint32_t)READ_REG(heth->Instance->MTLESTGCLDR); in HAL_ETHEx_GetGCLRegisters()1465 gclconf->BaseTimeRegister |= ((uint64_t)READ_REG(heth->Instance->MTLESTGCLDR) << 32U); in HAL_ETHEx_GetGCLRegisters()1476 gclconf->CycleTimeRegister = (uint32_t)READ_REG(heth->Instance->MTLESTGCLDR); in HAL_ETHEx_GetGCLRegisters()1487 gclconf->CycleTimeRegister |= ((uint64_t)READ_REG(heth->Instance->MTLESTGCLDR) << 32U); in HAL_ETHEx_GetGCLRegisters()1498 gclconf->TimeExtensionRegister = (uint32_t)READ_REG(heth->Instance->MTLESTGCLDR); in HAL_ETHEx_GetGCLRegisters()1509 gclconf->ListLengthRegister = (uint32_t)READ_REG(heth->Instance->MTLESTGCLDR); in HAL_ETHEx_GetGCLRegisters()1517 …atusTypeDef HAL_ETHEx_SetGCLRegisters(ETH_HandleTypeDef *heth, const ETH_GCLConfigTypeDef *gclconf) in HAL_ETHEx_SetGCLRegisters() argument1523 WRITE_REG(heth->Instance->MTLESTGCLDR, (uint32_t)gclconf->BaseTimeRegister); in HAL_ETHEx_SetGCLRegisters()1535 WRITE_REG(heth->Instance->MTLESTGCLDR, ((uint32_t)(gclconf->BaseTimeRegister >> 32))); in HAL_ETHEx_SetGCLRegisters()[all …]
701 …tusTypeDef HAL_ETHEx_SetGCLRegisters(ETH_HandleTypeDef *heth, const ETH_GCLConfigTypeDef *gclconf);702 HAL_StatusTypeDef HAL_ETHEx_SetGCLConfig(ETH_HandleTypeDef *heth, ETH_GCLConfigTypeDef *gclconf);703 HAL_StatusTypeDef HAL_ETHEx_GetGCLRegisters(ETH_HandleTypeDef *heth, ETH_GCLConfigTypeDef *gclconf);
