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Searched refs:channel_number (Results 1 – 8 of 8) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_dma.c1122 uint32_t channel_number; local
1133 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;
1142 channel_number = (((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 7U);
1152 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;
1160 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU);
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_dma.c1120 uint32_t channel_number; local
1131 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;
1140 channel_number = (((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 7U);
1147 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;
1154 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU);
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_dma.c1254 uint32_t channel_number; in DMA_CalcDMAMUXChannelBaseAndMask() local
1264 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; in DMA_CalcDMAMUXChannelBaseAndMask()
1273 channel_number = (((((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U) + 7U); in DMA_CalcDMAMUXChannelBaseAndMask()
1280 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU); in DMA_CalcDMAMUXChannelBaseAndMask()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_dma.c1029 uint32_t channel_number; in DMA_CalcDMAMUXChannelBaseAndMask() local
1031 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; in DMA_CalcDMAMUXChannelBaseAndMask()
1037 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1cU); in DMA_CalcDMAMUXChannelBaseAndMask()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_dma.c1060 uint32_t channel_number; in DMA_CalcDMAMUXChannelBaseAndMask() local
1078 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; in DMA_CalcDMAMUXChannelBaseAndMask()
1082 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU); in DMA_CalcDMAMUXChannelBaseAndMask()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_dma.c1118 uint32_t channel_number; in DMA_CalcDMAMUXChannelBaseAndMask() local
1132 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; in DMA_CalcDMAMUXChannelBaseAndMask()
1134 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU); in DMA_CalcDMAMUXChannelBaseAndMask()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_dma.c1048 uint32_t channel_number; in DMA_CalcDMAMUXChannelBaseAndMask() local
1069 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; in DMA_CalcDMAMUXChannelBaseAndMask()
1072 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU); in DMA_CalcDMAMUXChannelBaseAndMask()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_dma.c1315 uint32_t channel_number; in DMA_CalcDMAMUXChannelBaseAndMask() local
1329 channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U; in DMA_CalcDMAMUXChannelBaseAndMask()
1331 hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU); in DMA_CalcDMAMUXChannelBaseAndMask()