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Searched refs:ccr_reg (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_dma.c1211 uint32_t ccr_reg; in HAL_DMA_IRQHandler() local
1433 ccr_reg = (((BDMA_Channel_TypeDef *)hdma->Instance)->CCR); in HAL_DMA_IRQHandler()
1436 …if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR… in HAL_DMA_IRQHandler()
1442 if((ccr_reg & BDMA_CCR_DBM) != 0U) in HAL_DMA_IRQHandler()
1445 if((ccr_reg & BDMA_CCR_CT) == 0U) in HAL_DMA_IRQHandler()
1465 if((ccr_reg & BDMA_CCR_CIRC) == 0U) in HAL_DMA_IRQHandler()
1483 …else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDM… in HAL_DMA_IRQHandler()
1489 if((ccr_reg & BDMA_CCR_DBM) != 0U) in HAL_DMA_IRQHandler()
1492 if((ccr_reg & BDMA_CCR_CT) == 0U) in HAL_DMA_IRQHandler()
1512 if((ccr_reg & BDMA_CCR_CIRC) == 0U) in HAL_DMA_IRQHandler()
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Dstm32h7xx_hal_ospi.c2917 __IO uint32_t *ccr_reg; in OSPI_ConfigCmd() local
2933 ccr_reg = &(hospi->Instance->WCCR); in OSPI_ConfigCmd()
2940 ccr_reg = &(hospi->Instance->WPCCR); in OSPI_ConfigCmd()
2947 ccr_reg = &(hospi->Instance->CCR); in OSPI_ConfigCmd()
2954 *ccr_reg = (cmd->DQSMode | cmd->SIOOMode); in OSPI_ConfigCmd()
2962 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_ABMODE | OCTOSPI_CCR_ABDTR | OCTOSPI_CCR_ABSIZE), in OSPI_ConfigCmd()
2987 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
2999 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
3008 MODIFY_REG((*ccr_reg), OCTOSPI_CCR_DDTR, HAL_OSPI_DATA_DTR_ENABLE); in OSPI_ConfigCmd()
3025 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_xspi.c3011 __IO uint32_t *ccr_reg; in XSPI_ConfigCmd() local
3027 ccr_reg = &(hxspi->Instance->WCCR); in XSPI_ConfigCmd()
3034 ccr_reg = &(hxspi->Instance->WPCCR); in XSPI_ConfigCmd()
3041 ccr_reg = &(hxspi->Instance->CCR); in XSPI_ConfigCmd()
3048 *ccr_reg = (pCmd->DQSMode | pCmd->SIOOMode); in XSPI_ConfigCmd()
3055 SET_BIT((*ccr_reg), XSPI_CCR_DQSE); in XSPI_ConfigCmd()
3064 MODIFY_REG((*ccr_reg), (XSPI_CCR_ABMODE | XSPI_CCR_ABDTR | XSPI_CCR_ABSIZE), in XSPI_ConfigCmd()
3108 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
3120 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
3129 MODIFY_REG((*ccr_reg), XSPI_CCR_DDTR, HAL_XSPI_DATA_DTR_ENABLE); in XSPI_ConfigCmd()
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_ospi.c2632 __IO uint32_t *ccr_reg; in OSPI_ConfigCmd() local
2648 ccr_reg = &(hospi->Instance->WCCR); in OSPI_ConfigCmd()
2655 ccr_reg = &(hospi->Instance->WPCCR); in OSPI_ConfigCmd()
2662 ccr_reg = &(hospi->Instance->CCR); in OSPI_ConfigCmd()
2669 *ccr_reg = (cmd->DQSMode | cmd->SIOOMode); in OSPI_ConfigCmd()
2677 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_ABMODE | OCTOSPI_CCR_ABDTR | OCTOSPI_CCR_ABSIZE), in OSPI_ConfigCmd()
2702 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
2714 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
2723 MODIFY_REG((*ccr_reg), OCTOSPI_CCR_DDTR, HAL_OSPI_DATA_DTR_ENABLE); in OSPI_ConfigCmd()
2740 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_xspi.c3604 __IO uint32_t *ccr_reg; in XSPI_ConfigCmd() local
3638 ccr_reg = &(hxspi->Instance->WCCR); in XSPI_ConfigCmd()
3645 ccr_reg = &(hxspi->Instance->WPCCR); in XSPI_ConfigCmd()
3652 ccr_reg = &(hxspi->Instance->CCR); in XSPI_ConfigCmd()
3659 *ccr_reg = (pCmd->DQSMode | pCmd->SIOOMode); in XSPI_ConfigCmd()
3666 SET_BIT((*ccr_reg), XSPI_CCR_DQSE); in XSPI_ConfigCmd()
3675 MODIFY_REG((*ccr_reg), (XSPI_CCR_ABMODE | XSPI_CCR_ABDTR | XSPI_CCR_ABSIZE), in XSPI_ConfigCmd()
3719 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
3731 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
3740 MODIFY_REG((*ccr_reg), XSPI_CCR_DDTR, HAL_XSPI_DATA_DTR_ENABLE); in XSPI_ConfigCmd()
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Dstm32u5xx_hal_ospi.c3045 __IO uint32_t *ccr_reg; in OSPI_ConfigCmd() local
3061 ccr_reg = &(hospi->Instance->WCCR); in OSPI_ConfigCmd()
3068 ccr_reg = &(hospi->Instance->WPCCR); in OSPI_ConfigCmd()
3075 ccr_reg = &(hospi->Instance->CCR); in OSPI_ConfigCmd()
3082 *ccr_reg = (cmd->DQSMode | cmd->SIOOMode); in OSPI_ConfigCmd()
3090 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_ABMODE | OCTOSPI_CCR_ABDTR | OCTOSPI_CCR_ABSIZE), in OSPI_ConfigCmd()
3115 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
3127 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
3136 MODIFY_REG((*ccr_reg), OCTOSPI_CCR_DDTR, HAL_OSPI_DATA_DTR_ENABLE); in OSPI_ConfigCmd()
3153 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_xspi.c3225 __IO uint32_t *ccr_reg; in XSPI_ConfigCmd() local
3241 ccr_reg = &(hxspi->Instance->WCCR); in XSPI_ConfigCmd()
3248 ccr_reg = &(hxspi->Instance->WPCCR); in XSPI_ConfigCmd()
3255 ccr_reg = &(hxspi->Instance->CCR); in XSPI_ConfigCmd()
3262 *ccr_reg = pCmd->DQSMode; in XSPI_ConfigCmd()
3270 MODIFY_REG((*ccr_reg), (XSPI_CCR_ABMODE | XSPI_CCR_ABDTR | XSPI_CCR_ABSIZE), in XSPI_ConfigCmd()
3314 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
3326 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
3335 MODIFY_REG((*ccr_reg), XSPI_CCR_DDTR, HAL_XSPI_DATA_DTR_ENABLE); in XSPI_ConfigCmd()
3351 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_xspi.c3172 __IO uint32_t *ccr_reg; in XSPI_ConfigCmd() local
3188 ccr_reg = &(hxspi->Instance->WCCR); in XSPI_ConfigCmd()
3195 ccr_reg = &(hxspi->Instance->WPCCR); in XSPI_ConfigCmd()
3202 ccr_reg = &(hxspi->Instance->CCR); in XSPI_ConfigCmd()
3209 *ccr_reg = pCmd->DQSMode; in XSPI_ConfigCmd()
3217 MODIFY_REG((*ccr_reg), (XSPI_CCR_ABMODE | XSPI_CCR_ABDTR | XSPI_CCR_ABSIZE), in XSPI_ConfigCmd()
3261 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
3273 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
3282 MODIFY_REG((*ccr_reg), XSPI_CCR_DDTR, HAL_XSPI_DATA_DTR_ENABLE); in XSPI_ConfigCmd()
3298 MODIFY_REG((*ccr_reg), (XSPI_CCR_IMODE | XSPI_CCR_IDTR | XSPI_CCR_ISIZE | in XSPI_ConfigCmd()
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_ospi.c2929 __IO uint32_t *ccr_reg; in OSPI_ConfigCmd() local
2945 ccr_reg = &(hospi->Instance->WCCR); in OSPI_ConfigCmd()
2952 ccr_reg = &(hospi->Instance->CCR); in OSPI_ConfigCmd()
2959 *ccr_reg = (cmd->DQSMode | cmd->SIOOMode); in OSPI_ConfigCmd()
2967 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_ABMODE | OCTOSPI_CCR_ABDTR | OCTOSPI_CCR_ABSIZE), in OSPI_ConfigCmd()
2992 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
3004 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
3013 MODIFY_REG((*ccr_reg), OCTOSPI_CCR_DDTR, HAL_OSPI_DATA_DTR_ENABLE); in OSPI_ConfigCmd()
3030 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE | in OSPI_ConfigCmd()
3040 MODIFY_REG((*ccr_reg), (OCTOSPI_CCR_IMODE | OCTOSPI_CCR_IDTR | OCTOSPI_CCR_ISIZE), in OSPI_ConfigCmd()
[all …]