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Searched refs:__SEM_MASK__ (Results 1 – 5 of 5) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_hsem.h56 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
57 (HSEM->C1IER |= (__SEM_MASK__)) : \
58 (HSEM->C2IER |= (__SEM_MASK__)))
60 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->IER |= (__SEM_MASK__))
68 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
69 (HSEM->C1IER &= ~(__SEM_MASK__)) : \
70 (HSEM->C2IER &= ~(__SEM_MASK__)))
72 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->IER &= ~(__SEM_MASK__))
81 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
82 ((__SEM_MASK__) & HSEM->C1MISR) : \
[all …]
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_hsem.h56 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
57 (HSEM->C1IER |= (__SEM_MASK__)) : \
58 (HSEM->C2IER |= (__SEM_MASK__)))
60 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->IER |= (__SEM_MASK__))
68 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
69 (HSEM->C1IER &= ~(__SEM_MASK__)) : \
70 (HSEM->C2IER &= ~(__SEM_MASK__)))
72 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->IER &= ~(__SEM_MASK__))
81 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
82 ((__SEM_MASK__) & HSEM->C1MISR) : \
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_hsem.h56 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
57 (HSEM->C1IER |= (__SEM_MASK__)) : \
58 (HSEM->C2IER |= (__SEM_MASK__)))
60 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->IER |= (__SEM_MASK__))
68 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
69 (HSEM->C1IER &= ~(__SEM_MASK__)) : \
70 (HSEM->C2IER &= ~(__SEM_MASK__)))
72 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->IER &= ~(__SEM_MASK__))
81 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
82 ((__SEM_MASK__) & HSEM->C1MISR) : \
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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_hsem.h56 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
57 (HSEM->C1IER |= (__SEM_MASK__)) : \
58 (HSEM->C2IER |= (__SEM_MASK__)))
60 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->IER |= (__SEM_MASK__))
68 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
69 (HSEM->C1IER &= ~(__SEM_MASK__)) : \
70 (HSEM->C2IER &= ~(__SEM_MASK__)))
72 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->IER &= ~(__SEM_MASK__))
81 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \ argument
82 ((__SEM_MASK__) & HSEM->C1MISR) : \
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_hsem.h76 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->SIER |= (__SEM_MASK__)) argument
78 #define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->IER |= (__SEM_MASK__))
86 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->SIER &= ~(__SEM_MASK__)) argument
88 #define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->IER &= ~(__SEM_MASK__))
97 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((__SEM_MASK__) & HSEM->SMISR) argument
99 #define __HAL_HSEM_GET_IT(__SEM_MASK__) ((__SEM_MASK__) & HSEM->MISR)
108 #define __HAL_HSEM_GET_FLAG(__SEM_MASK__) ((__SEM_MASK__) & HSEM->SISR) argument
110 #define __HAL_HSEM_GET_FLAG(__SEM_MASK__) ((__SEM_MASK__) & HSEM->ISR)
119 #define __HAL_HSEM_CLEAR_FLAG(__SEM_MASK__) (HSEM->SICR |= (__SEM_MASK__)) argument
121 #define __HAL_HSEM_CLEAR_FLAG(__SEM_MASK__) (HSEM->ICR |= (__SEM_MASK__))