Home
last modified time | relevance | path

Searched refs:__PLLP__ (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_rcc_ex.h827 #define __HAL_RCC_PLLSAI1_CONFIG(__PLLN__, __PLLP__, __PLLQ__, __PLLR__) \ argument
830 (((__PLLN__) << RCC_PLLCFGR_PLLN_Pos) | (__PLLP__) | (__PLLQ__) | (__PLLR__)))
863 #define __HAL_RCC_PLLSAI1_DIVP_CONFIG(__PLLP__) \ argument
864 MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLP, (__PLLP__))
Dstm32wbxx_ll_rcc.h940 #define __LL_RCC_CALC_PLLCLK_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__)… argument
941 (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
993 #define __LL_RCC_CALC_PLLCLK_ADC_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__)… argument
994 (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
Dstm32wbxx_hal_rcc.h3111 #define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ argument
3122 (uint32_t) (__PLLP__) | \
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_rcc.h913 #define __LL_RCC_CALC_PLLCLK_I2S1_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) \ argument
915 (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
967 #define __LL_RCC_CALC_PLLCLK_I2S2_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) \ argument
969 (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
1021 #define __LL_RCC_CALC_PLLCLK_ADC_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) \ argument
1023 (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
Dstm32g0xx_hal_rcc.h2786 #define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ argument
2793 (uint32_t) (__PLLP__) | \
2797 #define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLR__ ) \ argument
2804 (uint32_t) (__PLLP__) | \
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_rcc.h1340 #define __LL_RCC_CALC_PLLCLK_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__)… argument
1341 ((__PLLP__) >> RCC_PLLCFGR_PLLPDIV_Pos))
1364 #define __LL_RCC_CALC_PLLCLK_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__)… argument
1365 (((__PLLP__) == LL_RCC_PLLP_DIV_7) ? 7U : 17U))
Dstm32l4xx_hal_rcc.h4306 #define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ argument
4315 ((uint32_t)(__PLLP__) << RCC_PLLCFGR_PLLPDIV_Pos)))
4319 #define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ argument
4328 (((__PLLP__) >> 4U) << RCC_PLLCFGR_PLLP_Pos)))
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_rcc.h586 #define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__) / (… argument
587 ((((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos ) + 1U) * 2U))
Dstm32f2xx_hal_rcc.h1609 #define __HAL_RCC_PLL_CONFIG(__RCC_PLLSource__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__) \ argument
1613 ((((__PLLP__) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)))
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_rcc.h819 #define __LL_RCC_CALC_PLLCLK_ADC_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__)… argument
820 ((__PLLP__) >> RCC_PLLCFGR_PLLPDIV_Pos))
Dstm32g4xx_hal_rcc.h3017 #define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ argument
3026 ((__PLLP__) << RCC_PLLCFGR_PLLPDIV_Pos)))
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_rcc.h747 #define __LL_RCC_CALC_PLLCLK_ADC_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) \ argument
749 (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
Dstm32wlxx_hal_rcc.h2123 #define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ argument
2130 (uint32_t) (__PLLP__) | \
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_rcc.h963 #define __LL_RCC_CALC_PLLCLK_P_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) \ argument
965 (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
Dstm32u0xx_hal_rcc.h2463 #define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ argument
2472 (__PLLP__)))
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h2575 #define __HAL_RCC_PLL_CONFIG(__RCC_PLLSource__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__) \ argument
2578 ((((__PLLP__) >> 1) -1) << RCC_PLLCFGR_PLLP_Pos) | \
2609 #define __HAL_RCC_PLL_CONFIG(__RCC_PLLSource__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__) \ argument
2612 ((((__PLLP__) >> 1) -1) << RCC_PLLCFGR_PLLP_Pos) | \
Dstm32f7xx_ll_rcc.h1129 #define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__) / (… argument
1130 ((((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos ) + 1U) * 2U))
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_rcc.h1117 #define __LL_RCC_CALC_PLLCLK_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) \ argument
1119 ((__PLLP__) >> RCC_PLLCFGR_PLLPDIV_Pos))
Dstm32l5xx_hal_rcc.h3096 #define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ argument
3105 ((__PLLP__) << RCC_PLLCFGR_PLLPDIV_Pos)))
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_rcc.h1574 #define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__) / (… argument
1575 … ((((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos ) + 1U) * 2U))
Dstm32f4xx_hal_rcc_ex.h5834 #define __HAL_RCC_PLL_CONFIG(__RCC_PLLSource__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__) \ argument
5837 ((((__PLLP__) >> 1U) -1U) << RCC_PLLCFGR_PLLP_Pos) | \
5870 #define __HAL_RCC_PLL_CONFIG(__RCC_PLLSource__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__) \ argument
5873 ((((__PLLP__) >> 1U) -1U) << RCC_PLLCFGR_PLLP_Pos) | \