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Searched refs:USART_CR3_IREN (Results 1 – 25 of 427) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_usart.h1761 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
1774 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
1787 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2335 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2341 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2387 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2393 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2442 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2448 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2498 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_usart.h1088 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
1101 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
1114 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)); in LL_USART_IsEnabledIrda()
1485 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
1521 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
1561 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
1599 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
1639 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
1684 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
1720 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_usart.h1136 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
1149 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
1162 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)); in LL_USART_IsEnabledIrda()
1533 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
1569 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
1609 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
1647 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
1687 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
1732 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
1768 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_usart.h1088 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
1101 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
1114 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)); in LL_USART_IsEnabledIrda()
1485 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
1521 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
1561 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
1599 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
1639 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
1684 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
1720 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_usart.h1088 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
1101 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
1114 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)); in LL_USART_IsEnabledIrda()
1485 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
1521 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
1561 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
1599 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
1639 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
1684 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
1720 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_uart.c355 #if defined (USART_CR3_IREN) in HAL_UART_Init()
356 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in HAL_UART_Init()
361 #if defined (USART_CR3_IREN) in HAL_UART_Init()
362 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN)); in HAL_UART_Init()
438 #if defined (USART_CR3_IREN) in HAL_HalfDuplex_Init()
439 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); in HAL_HalfDuplex_Init()
444 #if defined (USART_CR3_IREN) in HAL_HalfDuplex_Init()
445 CLEAR_BIT(huart->Instance->CR3, USART_CR3_IREN); in HAL_HalfDuplex_Init()
537 #if defined (USART_CR3_IREN) in HAL_LIN_Init()
538 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in HAL_LIN_Init()
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_usart.h1738 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
1751 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
1764 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2300 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2337 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2378 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2417 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2458 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2504 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2541 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_usart.h1705 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
1718 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
1731 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2267 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2304 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2345 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2384 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2425 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2471 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2508 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_usart.h1765 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
1778 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
1791 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2327 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2364 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2405 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2444 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2485 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2531 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2568 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_usart.h2022 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2035 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2048 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2671 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2707 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2747 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2785 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2825 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2870 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2906 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_usart.h2031 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2044 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2057 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2681 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2718 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2759 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2798 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2839 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2885 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2922 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_usart.h2031 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2044 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2057 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2681 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2718 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2759 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2798 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2839 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2885 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2922 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_usart.h2024 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2037 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2050 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2674 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2711 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2752 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2791 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2832 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2878 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2915 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_usart.h2030 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2043 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2056 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2680 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2717 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2758 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2797 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2838 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2884 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2921 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_usart.h2030 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2043 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2056 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2680 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2717 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2758 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2797 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2838 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2884 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2921 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_usart.h2030 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2043 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2056 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2680 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2717 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2758 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2797 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2838 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2884 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2921 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_usart.h2017 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2030 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2043 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2667 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2704 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2745 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2784 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2825 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2871 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2908 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_usart.h2052 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2065 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2078 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2702 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2739 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2780 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2819 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2860 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2906 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2943 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_usart.h2031 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2044 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2057 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2681 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2718 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2759 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2798 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2839 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2885 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2922 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_usart.h2031 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2044 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2057 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2681 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2718 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2759 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2798 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2839 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2885 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2922 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_usart.h2013 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2026 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2039 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2663 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2700 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2741 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2780 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2821 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2867 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2904 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_usart.h2030 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2043 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2056 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2680 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2717 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2758 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2797 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2838 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2884 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2921 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_usart.h2031 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2044 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2057 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2681 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2718 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2759 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2798 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2839 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2885 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2922 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_usart.h2030 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2043 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2056 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2680 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2717 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2758 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2797 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2838 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2884 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2921 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_usart.h2165 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2178 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2191 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2817 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2854 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2895 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2934 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2975 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
3021 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
3058 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()

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