1 /** 2 ****************************************************************************** 3 * @file stm32n6xx_hal_tim_ex.h 4 * @author MCD Application Team 5 * @brief Header file of TIM HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32N6xx_HAL_TIM_EX_H 21 #define STM32N6xx_HAL_TIM_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32n6xx_hal_def.h" 29 30 /** @addtogroup STM32N6xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup TIMEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief TIM Hall sensor Configuration Structure definition 45 */ 46 47 typedef struct 48 { 49 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 50 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 51 52 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 53 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 54 55 uint32_t IC1Filter; /*!< Specifies the input capture filter. 56 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 57 58 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 59 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 60 } TIM_HallSensor_InitTypeDef; 61 62 /** 63 * @brief TIM Break/Break2 input configuration 64 */ 65 typedef struct 66 { 67 uint32_t Source; /*!< Specifies the source of the timer break input. 68 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 69 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 70 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 71 uint32_t Polarity; /*!< Specifies the break input source polarity. 72 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity */ 73 } TIMEx_BreakInputConfigTypeDef; 74 75 /** 76 * @brief TIM Encoder index configuration 77 */ 78 typedef struct 79 { 80 uint32_t Polarity; /*!< TIM Encoder index polarity.This parameter can be a value of @ref TIMEx_Encoder_Index_Polarity */ 81 82 uint32_t Prescaler; /*!< TIM Encoder index prescaler.This parameter can be a value of @ref TIMEx_Encoder_Index_Prescaler */ 83 84 uint32_t Filter; /*!< TIM Encoder index filter.This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 85 86 uint32_t Blanking; /*!< Specifies whether or not the encoder index event is conditioned by TI3 or TI4 input.This parameter can be a value of @ref TIMEx_Encoder_Index_Blanking */ 87 88 FunctionalState FirstIndexEnable; /*!< Specifies whether or not the encoder first index is enabled.This parameter value can be ENABLE or DISABLE. */ 89 90 uint32_t Position; /*!< Specifies in which AB input configuration the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Position */ 91 92 uint32_t Direction; /*!< Specifies in which counter direction the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Direction */ 93 94 } TIMEx_EncoderIndexConfigTypeDef; 95 96 /** 97 * @} 98 */ 99 /* End of exported types -----------------------------------------------------*/ 100 101 /* Exported constants --------------------------------------------------------*/ 102 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 103 * @{ 104 */ 105 106 /** @defgroup TIMEx_Remap TIM Extended Remapping 107 * @{ 108 */ 109 #define TIM_TIM1_ETR_GPIO 0x00000000UL /*!< TIM1_ETR is connected to I/O */ 110 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM1 ETR is connected to ADC1 AWD1 */ 111 #define TIM_TIM1_ETR_ADC1_AWD2 TIM_AF1_ETRSEL_2 /*!< TIM1 ETR is connected to ADC1 AWD2 */ 112 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0) /*!< TIM1 ETR is connected to ADC1 AWD3 */ 113 #define TIM_TIM1_ETR_ADC2_AWD1 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!< TIM1 ETR is connected to ADC2 AWD1 */ 114 #define TIM_TIM1_ETR_ADC2_AWD2 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM1 ETR is connected to ADC2 AWD2 */ 115 #define TIM_TIM1_ETR_ADC2_AWD3 TIM_AF1_ETRSEL_3 /*!< TIM1 ETR is connected to ADC2 AWD3 */ 116 117 #define TIM_TIM2_ETR_GPIO 0x00000000UL /*!< TIM2 ETR is connected to GPIO */ 118 #define TIM_TIM2_ETR_DCMIPP_HSYNC TIM_AF1_ETRSEL_0 /*!< TIM2_ETR is connected to DCMIPP HSYNC */ 119 #define TIM_TIM2_ETR_LCD_HSYNC TIM_AF1_ETRSEL_1 /*!< TIM2_ETR is connected to LCD HSYNC */ 120 #define TIM_TIM2_ETR_SAI1_FSA TIM_AF1_ETRSEL_2 /*!< TIM2_ETR is connected to SAI1 FS_A */ 121 #define TIM_TIM2_ETR_SAI1_FSB (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to SAI1 FS_B */ 122 #define TIM_TIM2_ETR_GFXTIM_TE (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!< TIM2_ETR is connected to GFXTIM TE */ 123 #define TIM_TIM2_ETR_DCMIPP_VSYNC (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to DCMIPP VSYNC */ 124 #define TIM_TIM2_ETR_LCD_VSYNC TIM_AF1_ETRSEL_3 /*!< TIM2_ETR is connected to LCD VSYNC */ 125 #define TIM_TIM2_ETR_TIM3_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1) /*!< TIM2_ETR is connected to TIM3_ETR */ 126 #define TIM_TIM2_ETR_TIM4_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to TIM4_ETR */ 127 #define TIM_TIM2_ETR_TIM5_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2) /*!< TIM2_ETR is connected to TIM5_ETR */ 128 #define TIM_TIM2_ETR_ETH1_PPS (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to ETH1 PPS */ 129 #define TIM_TIM2_ETR_USB1_SOF (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!< TIM2_ETR is connected to USB1 OTG SOF */ 130 #define TIM_TIM2_ETR_USB2_SOF (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to USB2 OTG SOF */ 131 132 #define TIM_TIM3_ETR_GPIO 0x00000000UL /*!< TIM3 ETR is connected to GPIO */ 133 #define TIM_TIM3_ETR_DCMIPP_HSYNC TIM_AF1_ETRSEL_0 /*!< TIM3 ETR is connected to DCMIPP HSYNC */ 134 #define TIM_TIM3_ETR_LCD_HSYNC TIM_AF1_ETRSEL_1 /*!< TIM3 ETR is connected to LCD HSYNC */ 135 #define TIM_TIM3_ETR_GFXTIM_TE (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!< TIM3 ETR is connected to GFXTIM TE */ 136 #define TIM_TIM3_ETR_DCMIPP_VSYNC (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM3 ETR is connected to DCMIPP VSYNC */ 137 #define TIM_TIM3_ETR_LCD_VSYNC TIM_AF1_ETRSEL_3 /*!< TIM3 ETR is connected to LCD VSYNC */ 138 #define TIM_TIM3_ETR_TIM2_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_0) /*!< TIM3 ETR is connected to TIM2 ETR */ 139 #define TIM_TIM3_ETR_TIM4_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM3 ETR is connected to TIM4_ETR */ 140 #define TIM_TIM3_ETR_TIM5_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2) /*!< TIM3 ETR is connected to TIM5_ETR */ 141 #define TIM_TIM3_ETR_ETH1_PPS (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0) /*!< TIM3_ETR is connected to ETH1 PPS */ 142 143 #define TIM_TIM4_ETR_GPIO 0x00000000UL /*!< TIM4 ETR is connected to GPIO */ 144 #define TIM_TIM4_ETR_DCMIPP_HSYNC TIM_AF1_ETRSEL_0 /*!< TIM4 ETR is connected to DCMIPP HSYNC */ 145 #define TIM_TIM4_ETR_LCD_HSYNC TIM_AF1_ETRSEL_1 /*!< TIM4 ETR is connected to LCD HSYNC */ 146 #define TIM_TIM4_ETR_GFXTIM_TE (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!< TIM4 ETR is connected to GFXTIM TE */ 147 #define TIM_TIM4_ETR_DCMIPP_VSYNC (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM4 ETR is connected to DCMIPP VSYNC */ 148 #define TIM_TIM4_ETR_LCD_VSYNC TIM_AF1_ETRSEL_3 /*!< TIM4 ETR is connected to LCD VSYNC */ 149 #define TIM_TIM4_ETR_TIM2_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_0) /*!< TIM4 ETR is connected to TIM2 ETR */ 150 #define TIM_TIM4_ETR_TIM3_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1) /*!< TIM4 ETR is connected to TIM3_ETR */ 151 #define TIM_TIM4_ETR_TIM5_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2) /*!< TIM4 ETR is connected to TIM5_ETR */ 152 153 #define TIM_TIM5_ETR_GPIO 0x00000000UL /*!< TIM5 ETR is connected to GPIO */ 154 #define TIM_TIM5_ETR_SAI2_FSA TIM_AF1_ETRSEL_0 /*!< TIM5_ETR is connected to SAI2 FS_A */ 155 #define TIM_TIM5_ETR_SAI2_FSB TIM_AF1_ETRSEL_1 /*!< TIM5_ETR is connected to SAI2 FS_B */ 156 #define TIM_TIM5_ETR_DCMIPP_HSYNC (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM5 ETR is connected to DCMIPP HSYNC */ 157 #define TIM_TIM5_ETR_LCD_HSYNC TIM_AF1_ETRSEL_2 /*!< TIM5 ETR is connected to LCD HSYNC */ 158 #define TIM_TIM5_ETR_GFXTIM_TE (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!< TIM5 ETR is connected to GFXTIM TE */ 159 #define TIM_TIM5_ETR_DCMIPP_VSYNC (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM5 ETR is connected to DCMIPP VSYNC */ 160 #define TIM_TIM5_ETR_LCD_VSYNC TIM_AF1_ETRSEL_3 /*!< TIM5 ETR is connected to LCD VSYNC */ 161 #define TIM_TIM5_ETR_TIM2_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_0) /*!< TIM5 ETR is connected to TIM2_ETR */ 162 #define TIM_TIM5_ETR_TIM3_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1) /*!< TIM5 ETR is connected to TIM3_ETR */ 163 #define TIM_TIM5_ETR_TIM4_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM5 ETR is connected to TIM4_ETR */ 164 #define TIM_TIM5_ETR_USB1_SOF (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!< TIM5_ETR is connected to USB1 OTG SOF */ 165 #define TIM_TIM5_ETR_USB2_SOF (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM5_ETR is connected to USB2 OTG SOF */ 166 167 #define TIM_TIM8_ETR_GPIO 0x00000000UL /*!< TIM8 ETR is connected to GPIO */ 168 #define TIM_TIM8_ETR_ADC2_AWD1 (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM8 ETR is connected to ADC2 AWD1 */ 169 #define TIM_TIM8_ETR_ADC2_AWD2 TIM_AF1_ETRSEL_2 /*!< TIM8 ETR is connected to ADC2 AWD2 */ 170 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_0) /*!< TIM8 ETR is connected to ADC2 AWD3 */ 171 /** 172 * @} 173 */ 174 175 /** @defgroup TIMEx_Break_Input TIM Extended Break input 176 * @{ 177 */ 178 #define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */ 179 #define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */ 180 /** 181 * @} 182 */ 183 184 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 185 * @{ 186 */ 187 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /*!< An external source (GPIO) is connected to the BKIN pin */ 188 #define TIM_BREAKINPUTSOURCE_MDF1 0x00000008U /*!< The analog watchdog output of the MDF1 peripheral is connected to the break input */ 189 /** 190 * @} 191 */ 192 193 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 194 * @{ 195 */ 196 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */ 197 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */ 198 /** 199 * @} 200 */ 201 202 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 203 * @{ 204 */ 205 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */ 206 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */ 207 /** 208 * @} 209 */ 210 211 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection 212 * @{ 213 */ 214 #define TIM_TIM2_TI1_GPIO 0x00000000UL /*!< TIM2 TI1 is connected to GPIO */ 215 #define TIM_TIM2_TI1_ETH1_PPS TIM_TISEL_TI1SEL_0 /*!< TIM2 TI1 is connected to ETH1 PPS */ 216 217 #define TIM_TIM3_TI1_GPIO 0x00000000UL /*!< TIM3 TI1 is connected to GPIO */ 218 #define TIM_TIM3_TI1_ETH1_PPS TIM_TISEL_TI1SEL_0 /*!< TIM3 TI1 is connected to ETH1 PPS */ 219 #define TIM_TIM3_TI1_FDCAN_RTP TIM_TISEL_TI1SEL_1 /*!< TIM3_TI1 is connected to FDCAN RTP */ 220 #define TIM_TIM3_TI1_FDCAN_TMP (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM3_TI1 is connected to FDCAN TMP */ 221 #define TIM_TIM3_TI1_FDCAN_SOC TIM_TISEL_TI1SEL_2 /*!< TIM3_TI1 is connected to FDCAN SOC */ 222 223 #define TIM_TIM5_TI1_GPIO 0x00000000UL /*!< TIM5 TI1 is connected to GPIO */ 224 #define TIM_TIM5_TI1_FDCAN_RTP TIM_TISEL_TI1SEL_1 /*!< TIM5_TI1 is connected to FDCAN RTP */ 225 #define TIM_TIM5_TI1_FDCAN_TMP (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM5_TI1 is connected to FDCAN TMP */ 226 227 #define TIM_TIM9_TI1_GPIO 0x00000000UL /*!< TIM9 TI1 is connected to GPIO */ 228 #define TIM_TIM9_TI1_MCO1 TIM_TISEL_TI1SEL_2 /*!< TIM9 TI1 is connected to MCO1 */ 229 #define TIM_TIM9_TI1_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM9 TI1 is connected to MCO2 */ 230 231 #define TIM_TIM10_TI1_GPIO 0x00000000UL /*!< TIM10_TI1 is connected to GPIO */ 232 #define TIM_TIM10_TI1_I3C1_IBIACK TIM_TISEL_TI1SEL_0 /*!< TIM10_TI1 is connected to I3C1 IBI ACK */ 233 234 #define TIM_TIM11_TI1_GPIO 0x00000000UL /*!< TIM11_TI1 is connected to GPIO */ 235 #define TIM_TIM11_TI1_I3C2_IBIACK TIM_TISEL_TI1SEL_0 /*!< TIM11_TI1 is connected to I3C2 IBI ACK */ 236 237 #define TIM_TIM12_TI1_GPIO 0x00000000UL /*!< TIM12 TI1 is connected to GPIO */ 238 #define TIM_TIM12_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /*!< TIM12 TI1 is connected to SPDIF FS */ 239 #define TIM_TIM12_TI1_HSI_1024 TIM_TISEL_TI1SEL_1 /*!< TIM12 TI1 is connected to HSI/1024 */ 240 #define TIM_TIM12_TI1_MSI_128 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM12_TI1 is connected to MSI/128 */ 241 #define TIM_TIM12_TI1_MCO1 TIM_TISEL_TI1SEL_2 /*!< TIM12 TI1 is connected to MCO1 */ 242 #define TIM_TIM12_TI1_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM12 TI1 is connected to MCO2 */ 243 244 #define TIM_TIM13_TI1_GPIO 0x00000000UL /*!< TIM13_TI1 is connected to GPIO */ 245 #define TIM_TIM13_TI1_I3C1_IBIACK TIM_TISEL_TI1SEL_0 /*!< TIM13_TI1 is connected to I3C1 IBI ACK */ 246 247 #define TIM_TIM14_TI1_GPIO 0x00000000UL /*!< TIM14_TI1 is connected to GPIO */ 248 #define TIM_TIM14_TI1_I3C2_IBIACK TIM_TISEL_TI1SEL_0 /*!< TIM14_TI1 is connected to I3C2 IBI ACK */ 249 250 #define TIM_TIM15_TI1_GPIO 0x00000000UL /*!< TIM15 TI1 is connected to GPIO */ 251 #define TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0 /*!< TIM15 TI1 is connected to TIM2 CH1 */ 252 #define TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1 /*!< TIM15 TI1 is connected to TIM3 CH1 */ 253 #define TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM15 TI1 is connected to TIM4 CH1 */ 254 #define TIM_TIM15_TI1_MCO1 TIM_TISEL_TI1SEL_2 /*!< TIM15 TI1 is connected to MCO1 */ 255 #define TIM_TIM15_TI1_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM15 TI1 is connected to MCO2 */ 256 #define TIM_TIM15_TI2_GPIO 0x00000000UL /*!< TIM15 TI2 is connected to GPIO */ 257 #define TIM_TIM15_TI2_TIM2_CH2 TIM_TISEL_TI2SEL_0 /*!< TIM15 TI2 is connected to TIM2 CH2 */ 258 #define TIM_TIM15_TI2_TIM3_CH2 TIM_TISEL_TI2SEL_1 /*!< TIM15 TI2 is connected to TIM3 CH2 */ 259 #define TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_1 | TIM_TISEL_TI2SEL_0) /*!< TIM15 TI2 is connected to TIM4 CH2 */ 260 261 #define TIM_TIM16_TI1_GPIO 0x00000000UL /*!< TIM16 TI1 is connected to GPIO */ 262 #define TIM_TIM16_TI1_LSI TIM_TISEL_TI1SEL_0 /*!< TIM16 TI1 is connected to LSI */ 263 #define TIM_TIM16_TI1_LSE TIM_TISEL_TI1SEL_1 /*!< TIM16 TI1 is connected to LSE */ 264 #define TIM_TIM16_TI1_RTC_WKUP (TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /*!< TIM16 TI1 is connected to RTC wakeup interrupt */ 265 266 #define TIM_TIM17_TI1_GPIO 0x00000000UL /*!< TIM17 TI1 is connected to GPIO */ 267 #define TIM_TIM17_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /*!< TIM17 TI1 is connected to SPDIF FS */ 268 #define TIM_TIM17_TI1_HSE_1024 TIM_TISEL_TI1SEL_1 /*!< TIM17 TI1 is connected to HSE/1024 */ 269 /** 270 * @} 271 */ 272 273 /** @defgroup TIMEx_SMS_Preload_Enable TIM Extended Bitfield SMS preload enabling 274 * @{ 275 */ 276 #define TIM_SMS_PRELOAD_SOURCE_UPDATE 0x00000000U /*!< Prelaod of SMS bitfield is disabled */ 277 #define TIM_SMS_PRELOAD_SOURCE_INDEX TIM_SMCR_SMSPS /*!< Preload of SMS bitfield is enabled */ 278 /** 279 * @} 280 */ 281 282 /** @defgroup TIMEx_Encoder_Index_Blanking TIM Extended Encoder index blanking 283 * @{ 284 */ 285 #define TIM_ENCODERINDEX_BLANKING_DISABLE 0x00000000U /*!< Encoder index blanking is disabled */ 286 #define TIM_ENCODERINDEX_BLANKING_TI3 TIM_ECR_IBLK_0 /*!< Encoder index blanking is enabled on TI3 */ 287 #define TIM_ENCODERINDEX_BLANKING_TI4 TIM_ECR_IBLK_1 /*!< Encoder index blanking is enabled on TI4 */ 288 289 /** 290 * @} 291 */ 292 293 /** @defgroup TIMEx_Encoder_Index_Position TIM Extended Encoder index position 294 * @{ 295 */ 296 #define TIM_ENCODERINDEX_POSITION_00 0x00000000U /*!< Encoder index position is AB=00 */ 297 #define TIM_ENCODERINDEX_POSITION_01 TIM_ECR_IPOS_0 /*!< Encoder index position is AB=01 */ 298 #define TIM_ENCODERINDEX_POSITION_10 TIM_ECR_IPOS_1 /*!< Encoder index position is AB=10 */ 299 #define TIM_ENCODERINDEX_POSITION_11 (TIM_ECR_IPOS_1 | TIM_ECR_IPOS_0) /*!< Encoder index position is AB=11 */ 300 #define TIM_ENCODERINDEX_POSITION_0 0x00000000U /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 0 */ 301 #define TIM_ENCODERINDEX_POSITION_1 TIM_ECR_IPOS_0 /*!< In directional clock mode or clock plus direction mode, index resets the counter when clock is 1 */ 302 /** 303 * @} 304 */ 305 306 /** @defgroup TIMEx_Encoder_Index_Direction TIM Extended Encoder index direction 307 * @{ 308 */ 309 #define TIM_ENCODERINDEX_DIRECTION_UP_DOWN 0x00000000U /*!< Index resets the counter whatever the direction */ 310 #define TIM_ENCODERINDEX_DIRECTION_UP TIM_ECR_IDIR_0 /*!< Index resets the counter when up-counting only */ 311 #define TIM_ENCODERINDEX_DIRECTION_DOWN TIM_ECR_IDIR_1 /*!< Index resets the counter when down-counting only */ 312 /** 313 * @} 314 */ 315 316 /** @defgroup TIMEx_Encoder_Index_Polarity TIM Extended Encoder index polarity 317 * @{ 318 */ 319 #define TIM_ENCODERINDEX_POLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */ 320 #define TIM_ENCODERINDEX_POLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */ 321 /** 322 * @} 323 */ 324 325 /** @defgroup TIMEx_Encoder_Index_Prescaler TIM Extended Encodder index prescaler 326 * @{ 327 */ 328 #define TIM_ENCODERINDEX_PRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ 329 #define TIM_ENCODERINDEX_PRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */ 330 #define TIM_ENCODERINDEX_PRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */ 331 #define TIM_ENCODERINDEX_PRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */ 332 /** 333 * @} 334 */ 335 336 /** 337 * @} 338 */ 339 /* End of exported constants -------------------------------------------------*/ 340 341 /* Exported macro ------------------------------------------------------------*/ 342 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 343 * @{ 344 */ 345 346 /** 347 * @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency. 348 * @note ex: @ref __HAL_TIM_CALC_PSC(80000000, 1000000); 349 * @param __TIMCLK__ timer input clock frequency (in Hz) 350 * @param __CNTCLK__ counter clock frequency (in Hz) 351 * @retval Prescaler value (between Min_Data=0 and Max_Data=65535) 352 */ 353 #define __HAL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \ 354 ((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U 355 356 /** 357 * @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency. 358 * @note ex: @ref __HAL_TIM_CALC_PERIOD(1000000, 0, 10000); 359 * @param __TIMCLK__ timer input clock frequency (in Hz) 360 * @param __PSC__ prescaler 361 * @param __FREQ__ output signal frequency (in Hz) 362 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 363 */ 364 #define __HAL_TIM_CALC_PERIOD(__TIMCLK__, __PSC__, __FREQ__) \ 365 (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U 366 367 /** 368 * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required 369 * output signal frequency. 370 * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER(1000000, 0, 10000); 371 * @note This macro should be used only if dithering is already enabled 372 * @param __TIMCLK__ timer input clock frequency (in Hz) 373 * @param __PSC__ prescaler 374 * @param __FREQ__ output signal frequency (in Hz) 375 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65519) 376 */ 377 #define __HAL_TIM_CALC_PERIOD_DITHER(__TIMCLK__, __PSC__, __FREQ__) \ 378 (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? \ 379 (uint32_t)(((uint64_t)(__TIMCLK__)*16/((__FREQ__) * ((__PSC__) + 1U)) - 16U)) : 0U 380 381 /** 382 * @brief HELPER macro calculating the compare value required to achieve the required timer output compare 383 * active/inactive delay. 384 * @note ex: @ref __HAL_TIM_CALC_PULSE(1000000, 0, 10); 385 * @param __TIMCLK__ timer input clock frequency (in Hz) 386 * @param __PSC__ prescaler 387 * @param __DELAY__ timer output compare active/inactive delay (in us) 388 * @retval Compare value (between Min_Data=0 and Max_Data=65535) 389 */ 390 #define __HAL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__) \ 391 ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ 392 / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 393 394 /** 395 * @brief HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer 396 * output compare active/inactive delay. 397 * @note ex: @ref __HAL_TIM_CALC_PULSE_DITHER(1000000, 0, 10); 398 * @note This macro should be used only if dithering is already enabled 399 * @param __TIMCLK__ timer input clock frequency (in Hz) 400 * @param __PSC__ prescaler 401 * @param __DELAY__ timer output compare active/inactive delay (in us) 402 * @retval Compare value (between Min_Data=0 and Max_Data=65519) 403 */ 404 #define __HAL_TIM_CALC_PULSE_DITHER(__TIMCLK__, __PSC__, __DELAY__) \ 405 ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__) * 16U) \ 406 / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 407 408 /** 409 * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration 410 * (when the timer operates in one pulse mode). 411 * @note ex: @ref __HAL_TIM_CALC_PERIOD_BY_DELAY(1000000, 0, 10, 20); 412 * @param __TIMCLK__ timer input clock frequency (in Hz) 413 * @param __PSC__ prescaler 414 * @param __DELAY__ timer output compare active/inactive delay (in us) 415 * @param __PULSE__ pulse duration (in us) 416 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 417 */ 418 #define __HAL_TIM_CALC_PERIOD_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ 419 ((uint32_t)(__HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__PULSE__)) \ 420 + __HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__DELAY__)))) 421 422 /** 423 * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required 424 * pulse duration (when the timer operates in one pulse mode). 425 * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(1000000, 0, 10, 20); 426 * @note This macro should be used only if dithering is already enabled 427 * @param __TIMCLK__ timer input clock frequency (in Hz) 428 * @param __PSC__ prescaler 429 * @param __DELAY__ timer output compare active/inactive delay (in us) 430 * @param __PULSE__ pulse duration (in us) 431 * @retval Auto-reload value (between Min_Data=0 and Max_Data=65519) 432 */ 433 #define __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ 434 ((uint32_t)(__HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__PULSE__)) \ 435 + __HAL_TIM_CALC_PULSE_DITHER((__TIMCLK__), (__PSC__), (__DELAY__)))) 436 437 /** 438 * @} 439 */ 440 /* End of exported macro -----------------------------------------------------*/ 441 442 /* Private macro -------------------------------------------------------------*/ 443 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 444 * @{ 445 */ 446 #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \ 447 ((((INSTANCE) == TIM1) && (((TIM_REMAP) == TIM_TIM1_ETR_GPIO) || \ 448 ((TIM_REMAP) == TIM_TIM1_ETR_ADC1_AWD1) || \ 449 ((TIM_REMAP) == TIM_TIM1_ETR_ADC1_AWD2) || \ 450 ((TIM_REMAP) == TIM_TIM1_ETR_ADC1_AWD3) || \ 451 ((TIM_REMAP) == TIM_TIM1_ETR_ADC2_AWD1) || \ 452 ((TIM_REMAP) == TIM_TIM1_ETR_ADC2_AWD2) || \ 453 ((TIM_REMAP) == TIM_TIM1_ETR_ADC2_AWD3))) || \ 454 (((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_ETR_GPIO) || \ 455 ((TIM_REMAP) == TIM_TIM2_ETR_DCMIPP_HSYNC) || \ 456 ((TIM_REMAP) == TIM_TIM2_ETR_LCD_HSYNC) || \ 457 ((TIM_REMAP) == TIM_TIM2_ETR_SAI1_FSA) || \ 458 ((TIM_REMAP) == TIM_TIM2_ETR_SAI1_FSB) || \ 459 ((TIM_REMAP) == TIM_TIM2_ETR_GFXTIM_TE) || \ 460 ((TIM_REMAP) == TIM_TIM2_ETR_DCMIPP_VSYNC) || \ 461 ((TIM_REMAP) == TIM_TIM2_ETR_LCD_VSYNC) || \ 462 ((TIM_REMAP) == TIM_TIM2_ETR_TIM3_ETR) || \ 463 ((TIM_REMAP) == TIM_TIM2_ETR_TIM4_ETR) || \ 464 ((TIM_REMAP) == TIM_TIM2_ETR_TIM5_ETR) || \ 465 ((TIM_REMAP) == TIM_TIM2_ETR_ETH1_PPS) || \ 466 ((TIM_REMAP) == TIM_TIM2_ETR_USB1_SOF) || \ 467 ((TIM_REMAP) == TIM_TIM2_ETR_USB2_SOF))) || \ 468 (((INSTANCE) == TIM3) && (((TIM_REMAP) == TIM_TIM3_ETR_GPIO) || \ 469 ((TIM_REMAP) == TIM_TIM3_ETR_DCMIPP_HSYNC) || \ 470 ((TIM_REMAP) == TIM_TIM3_ETR_LCD_HSYNC) || \ 471 ((TIM_REMAP) == TIM_TIM3_ETR_GFXTIM_TE) || \ 472 ((TIM_REMAP) == TIM_TIM3_ETR_DCMIPP_VSYNC) || \ 473 ((TIM_REMAP) == TIM_TIM3_ETR_LCD_VSYNC) || \ 474 ((TIM_REMAP) == TIM_TIM3_ETR_TIM2_ETR) || \ 475 ((TIM_REMAP) == TIM_TIM3_ETR_TIM4_ETR) || \ 476 ((TIM_REMAP) == TIM_TIM3_ETR_TIM5_ETR) || \ 477 ((TIM_REMAP) == TIM_TIM3_ETR_ETH1_PPS))) || \ 478 (((INSTANCE) == TIM4) && (((TIM_REMAP) == TIM_TIM4_ETR_GPIO) || \ 479 ((TIM_REMAP) == TIM_TIM4_ETR_DCMIPP_HSYNC) || \ 480 ((TIM_REMAP) == TIM_TIM4_ETR_LCD_HSYNC) || \ 481 ((TIM_REMAP) == TIM_TIM4_ETR_GFXTIM_TE) || \ 482 ((TIM_REMAP) == TIM_TIM4_ETR_DCMIPP_VSYNC) || \ 483 ((TIM_REMAP) == TIM_TIM4_ETR_LCD_VSYNC) || \ 484 ((TIM_REMAP) == TIM_TIM4_ETR_TIM2_ETR) || \ 485 ((TIM_REMAP) == TIM_TIM4_ETR_TIM3_ETR) || \ 486 ((TIM_REMAP) == TIM_TIM4_ETR_TIM5_ETR))) || \ 487 (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_ETR_GPIO) || \ 488 ((TIM_REMAP) == TIM_TIM5_ETR_SAI2_FSA) || \ 489 ((TIM_REMAP) == TIM_TIM5_ETR_SAI2_FSB) || \ 490 ((TIM_REMAP) == TIM_TIM5_ETR_DCMIPP_HSYNC) || \ 491 ((TIM_REMAP) == TIM_TIM5_ETR_LCD_HSYNC) || \ 492 ((TIM_REMAP) == TIM_TIM5_ETR_GFXTIM_TE) || \ 493 ((TIM_REMAP) == TIM_TIM5_ETR_DCMIPP_VSYNC) || \ 494 ((TIM_REMAP) == TIM_TIM5_ETR_LCD_VSYNC) || \ 495 ((TIM_REMAP) == TIM_TIM5_ETR_TIM2_ETR) || \ 496 ((TIM_REMAP) == TIM_TIM5_ETR_TIM3_ETR) || \ 497 ((TIM_REMAP) == TIM_TIM5_ETR_TIM4_ETR) || \ 498 ((TIM_REMAP) == TIM_TIM5_ETR_USB1_SOF) || \ 499 ((TIM_REMAP) == TIM_TIM5_ETR_USB2_SOF))) || \ 500 (((INSTANCE) == TIM8) && (((TIM_REMAP) == TIM_TIM8_ETR_GPIO) || \ 501 ((TIM_REMAP) == TIM_TIM8_ETR_ADC2_AWD1) || \ 502 ((TIM_REMAP) == TIM_TIM8_ETR_ADC2_AWD2) || \ 503 ((TIM_REMAP) == TIM_TIM8_ETR_ADC2_AWD3)))) 504 505 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 506 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 507 508 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 509 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_MDF1)) 510 511 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 512 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 513 514 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 515 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 516 517 #define IS_TIM_TISEL_TIX_INSTANCE(INSTANCE, CHANNEL) \ 518 (IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL) && ((CHANNEL) < TIM_CHANNEL_5)) 519 520 #define IS_TIM_TISEL(__TISEL__) ((((__TISEL__) & 0xF0F0F0F0U) == 0x00000000U)) 521 522 #define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \ 523 ((((INSTANCE) == TIM1) && \ 524 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 525 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 526 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 527 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 528 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 529 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 530 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 531 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 532 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 533 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 534 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 535 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 536 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 537 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 538 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 539 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 540 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 541 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12))) \ 542 || \ 543 (((INSTANCE) == TIM2) && \ 544 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 545 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 546 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 547 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 548 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 549 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 550 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 551 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 552 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 553 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 554 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 555 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 556 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 557 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 558 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 559 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 560 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 561 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12))) \ 562 || \ 563 (((INSTANCE) == TIM3) && \ 564 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 565 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 566 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 567 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 568 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 569 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 570 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 571 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 572 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 573 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 574 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 575 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 576 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 577 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 578 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 579 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 580 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 581 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12))) \ 582 || \ 583 (((INSTANCE) == TIM4) && \ 584 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 585 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 586 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 587 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 588 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 589 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 590 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 591 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 592 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 593 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 594 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 595 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 596 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 597 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 598 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 599 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 600 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 601 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12))) \ 602 || \ 603 (((INSTANCE) == TIM5) && \ 604 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 605 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 606 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 607 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 608 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 609 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 610 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 611 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 612 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 613 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 614 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 615 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 616 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 617 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 618 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 619 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 620 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 621 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12) || \ 622 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR13))) \ 623 || \ 624 (((INSTANCE) == TIM8) && \ 625 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 626 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \ 627 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ 628 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 629 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 630 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 631 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 632 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 633 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 634 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 635 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 636 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 637 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 638 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 639 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 640 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 641 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 642 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12))) \ 643 || \ 644 (((INSTANCE) == TIM9) && \ 645 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 646 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 647 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 648 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 649 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 650 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 651 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 652 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 653 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 654 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 655 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 656 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 657 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 658 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 659 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 660 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12))) \ 661 || \ 662 (((INSTANCE) == TIM12) && \ 663 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 664 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 665 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 666 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 667 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 668 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 669 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 670 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 671 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 672 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 673 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 674 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 675 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 676 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR10) || \ 677 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 678 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12))) \ 679 || \ 680 (((INSTANCE) == TIM15) && \ 681 (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ 682 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ 683 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ 684 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ 685 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ 686 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ 687 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ 688 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ 689 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \ 690 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \ 691 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \ 692 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \ 693 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \ 694 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR9) || \ 695 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR11) || \ 696 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR12)))) 697 698 #define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \ 699 ((((INSTANCE) == TIM1) && \ 700 (((__SELECTION__) == TIM_TS_NONE) || \ 701 ((__SELECTION__) == TIM_TS_ITR1) || \ 702 ((__SELECTION__) == TIM_TS_ITR2) || \ 703 ((__SELECTION__) == TIM_TS_ITR3) || \ 704 ((__SELECTION__) == TIM_TS_ITR4) || \ 705 ((__SELECTION__) == TIM_TS_ITR5) || \ 706 ((__SELECTION__) == TIM_TS_ITR6) || \ 707 ((__SELECTION__) == TIM_TS_ITR7) || \ 708 ((__SELECTION__) == TIM_TS_ITR8) || \ 709 ((__SELECTION__) == TIM_TS_ITR9) || \ 710 ((__SELECTION__) == TIM_TS_ITR10) || \ 711 ((__SELECTION__) == TIM_TS_ITR11) || \ 712 ((__SELECTION__) == TIM_TS_ITR12) || \ 713 ((__SELECTION__) == TIM_TS_ETRF) || \ 714 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 715 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 716 ((__SELECTION__) == TIM_TS_TI2FP2))) \ 717 || \ 718 (((INSTANCE) == TIM2) && \ 719 (((__SELECTION__) == TIM_TS_NONE) || \ 720 ((__SELECTION__) == TIM_TS_ITR0) || \ 721 ((__SELECTION__) == TIM_TS_ITR2) || \ 722 ((__SELECTION__) == TIM_TS_ITR3) || \ 723 ((__SELECTION__) == TIM_TS_ITR4) || \ 724 ((__SELECTION__) == TIM_TS_ITR5) || \ 725 ((__SELECTION__) == TIM_TS_ITR6) || \ 726 ((__SELECTION__) == TIM_TS_ITR7) || \ 727 ((__SELECTION__) == TIM_TS_ITR8) || \ 728 ((__SELECTION__) == TIM_TS_ITR9) || \ 729 ((__SELECTION__) == TIM_TS_ITR10) || \ 730 ((__SELECTION__) == TIM_TS_ITR11) || \ 731 ((__SELECTION__) == TIM_TS_ITR12) || \ 732 ((__SELECTION__) == TIM_TS_ETRF) || \ 733 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 734 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 735 ((__SELECTION__) == TIM_TS_TI2FP2))) \ 736 || \ 737 (((INSTANCE) == TIM3) && \ 738 (((__SELECTION__) == TIM_TS_NONE) || \ 739 ((__SELECTION__) == TIM_TS_ITR0) || \ 740 ((__SELECTION__) == TIM_TS_ITR1) || \ 741 ((__SELECTION__) == TIM_TS_ITR3) || \ 742 ((__SELECTION__) == TIM_TS_ITR4) || \ 743 ((__SELECTION__) == TIM_TS_ITR5) || \ 744 ((__SELECTION__) == TIM_TS_ITR6) || \ 745 ((__SELECTION__) == TIM_TS_ITR7) || \ 746 ((__SELECTION__) == TIM_TS_ITR8) || \ 747 ((__SELECTION__) == TIM_TS_ITR9) || \ 748 ((__SELECTION__) == TIM_TS_ITR10) || \ 749 ((__SELECTION__) == TIM_TS_ITR11) || \ 750 ((__SELECTION__) == TIM_TS_ITR12) || \ 751 ((__SELECTION__) == TIM_TS_ETRF) || \ 752 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 753 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 754 ((__SELECTION__) == TIM_TS_TI2FP2))) \ 755 || \ 756 (((INSTANCE) == TIM4) && \ 757 (((__SELECTION__) == TIM_TS_NONE) || \ 758 ((__SELECTION__) == TIM_TS_ITR0) || \ 759 ((__SELECTION__) == TIM_TS_ITR1) || \ 760 ((__SELECTION__) == TIM_TS_ITR2) || \ 761 ((__SELECTION__) == TIM_TS_ITR4) || \ 762 ((__SELECTION__) == TIM_TS_ITR5) || \ 763 ((__SELECTION__) == TIM_TS_ITR6) || \ 764 ((__SELECTION__) == TIM_TS_ITR7) || \ 765 ((__SELECTION__) == TIM_TS_ITR8) || \ 766 ((__SELECTION__) == TIM_TS_ITR9) || \ 767 ((__SELECTION__) == TIM_TS_ITR10) || \ 768 ((__SELECTION__) == TIM_TS_ITR11) || \ 769 ((__SELECTION__) == TIM_TS_ITR12) || \ 770 ((__SELECTION__) == TIM_TS_ETRF) || \ 771 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 772 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 773 ((__SELECTION__) == TIM_TS_TI2FP2))) \ 774 || \ 775 (((INSTANCE) == TIM5) && \ 776 (((__SELECTION__) == TIM_TS_NONE) || \ 777 ((__SELECTION__) == TIM_TS_ITR0) || \ 778 ((__SELECTION__) == TIM_TS_ITR1) || \ 779 ((__SELECTION__) == TIM_TS_ITR2) || \ 780 ((__SELECTION__) == TIM_TS_ITR3) || \ 781 ((__SELECTION__) == TIM_TS_ITR5) || \ 782 ((__SELECTION__) == TIM_TS_ITR6) || \ 783 ((__SELECTION__) == TIM_TS_ITR7) || \ 784 ((__SELECTION__) == TIM_TS_ITR8) || \ 785 ((__SELECTION__) == TIM_TS_ITR9) || \ 786 ((__SELECTION__) == TIM_TS_ITR10) || \ 787 ((__SELECTION__) == TIM_TS_ITR11) || \ 788 ((__SELECTION__) == TIM_TS_ITR12) || \ 789 ((__SELECTION__) == TIM_TS_ITR13) || \ 790 ((__SELECTION__) == TIM_TS_ETRF) || \ 791 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 792 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 793 ((__SELECTION__) == TIM_TS_TI2FP2))) \ 794 || \ 795 (((INSTANCE) == TIM8) && \ 796 (((__SELECTION__) == TIM_TS_NONE) || \ 797 ((__SELECTION__) == TIM_TS_ITR0) || \ 798 ((__SELECTION__) == TIM_TS_ITR1) || \ 799 ((__SELECTION__) == TIM_TS_ITR2) || \ 800 ((__SELECTION__) == TIM_TS_ITR3) || \ 801 ((__SELECTION__) == TIM_TS_ITR4) || \ 802 ((__SELECTION__) == TIM_TS_ITR6) || \ 803 ((__SELECTION__) == TIM_TS_ITR7) || \ 804 ((__SELECTION__) == TIM_TS_ITR8) || \ 805 ((__SELECTION__) == TIM_TS_ITR9) || \ 806 ((__SELECTION__) == TIM_TS_ITR10) || \ 807 ((__SELECTION__) == TIM_TS_ITR11) || \ 808 ((__SELECTION__) == TIM_TS_ITR12) || \ 809 ((__SELECTION__) == TIM_TS_ETRF) || \ 810 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 811 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 812 ((__SELECTION__) == TIM_TS_TI2FP2))) \ 813 || \ 814 (((INSTANCE) == TIM9) && \ 815 (((__SELECTION__) == TIM_TS_NONE) || \ 816 ((__SELECTION__) == TIM_TS_ITR0) || \ 817 ((__SELECTION__) == TIM_TS_ITR1) || \ 818 ((__SELECTION__) == TIM_TS_ITR2) || \ 819 ((__SELECTION__) == TIM_TS_ITR3) || \ 820 ((__SELECTION__) == TIM_TS_ITR4) || \ 821 ((__SELECTION__) == TIM_TS_ITR5) || \ 822 ((__SELECTION__) == TIM_TS_ITR7) || \ 823 ((__SELECTION__) == TIM_TS_ITR8) || \ 824 ((__SELECTION__) == TIM_TS_ITR9) || \ 825 ((__SELECTION__) == TIM_TS_ITR10) || \ 826 ((__SELECTION__) == TIM_TS_ITR11) || \ 827 ((__SELECTION__) == TIM_TS_ITR12) || \ 828 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 829 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 830 ((__SELECTION__) == TIM_TS_TI2FP2))) \ 831 || \ 832 (((INSTANCE) == TIM12) && \ 833 (((__SELECTION__) == TIM_TS_NONE) || \ 834 ((__SELECTION__) == TIM_TS_ITR0) || \ 835 ((__SELECTION__) == TIM_TS_ITR1) || \ 836 ((__SELECTION__) == TIM_TS_ITR2) || \ 837 ((__SELECTION__) == TIM_TS_ITR3) || \ 838 ((__SELECTION__) == TIM_TS_ITR4) || \ 839 ((__SELECTION__) == TIM_TS_ITR5) || \ 840 ((__SELECTION__) == TIM_TS_ITR6) || \ 841 ((__SELECTION__) == TIM_TS_ITR8) || \ 842 ((__SELECTION__) == TIM_TS_ITR9) || \ 843 ((__SELECTION__) == TIM_TS_ITR10) || \ 844 ((__SELECTION__) == TIM_TS_ITR11) || \ 845 ((__SELECTION__) == TIM_TS_ITR12) || \ 846 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 847 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 848 ((__SELECTION__) == TIM_TS_TI2FP2))) \ 849 || \ 850 (((INSTANCE) == TIM15) && \ 851 (((__SELECTION__) == TIM_TS_NONE) || \ 852 ((__SELECTION__) == TIM_TS_ITR0) || \ 853 ((__SELECTION__) == TIM_TS_ITR1) || \ 854 ((__SELECTION__) == TIM_TS_ITR2) || \ 855 ((__SELECTION__) == TIM_TS_ITR3) || \ 856 ((__SELECTION__) == TIM_TS_ITR4) || \ 857 ((__SELECTION__) == TIM_TS_ITR5) || \ 858 ((__SELECTION__) == TIM_TS_ITR6) || \ 859 ((__SELECTION__) == TIM_TS_ITR7) || \ 860 ((__SELECTION__) == TIM_TS_ITR8) || \ 861 ((__SELECTION__) == TIM_TS_ITR9) || \ 862 ((__SELECTION__) == TIM_TS_ITR11) || \ 863 ((__SELECTION__) == TIM_TS_ITR12) || \ 864 ((__SELECTION__) == TIM_TS_TI1F_ED) || \ 865 ((__SELECTION__) == TIM_TS_TI1FP1) || \ 866 ((__SELECTION__) == TIM_TS_TI2FP2)))) 867 868 #define IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE(INSTANCE, __SELECTION__) \ 869 ((((INSTANCE) == TIM1) && \ 870 (((__SELECTION__) == TIM_TS_ITR1) || \ 871 ((__SELECTION__) == TIM_TS_ITR2) || \ 872 ((__SELECTION__) == TIM_TS_ITR3) || \ 873 ((__SELECTION__) == TIM_TS_ITR4) || \ 874 ((__SELECTION__) == TIM_TS_ITR5) || \ 875 ((__SELECTION__) == TIM_TS_ITR6) || \ 876 ((__SELECTION__) == TIM_TS_ITR7) || \ 877 ((__SELECTION__) == TIM_TS_ITR8) || \ 878 ((__SELECTION__) == TIM_TS_ITR9) || \ 879 ((__SELECTION__) == TIM_TS_ITR10) || \ 880 ((__SELECTION__) == TIM_TS_ITR11) || \ 881 ((__SELECTION__) == TIM_TS_ITR12) || \ 882 ((__SELECTION__) == TIM_TS_NONE))) \ 883 || \ 884 (((INSTANCE) == TIM2) && \ 885 (((__SELECTION__) == TIM_TS_ITR0) || \ 886 ((__SELECTION__) == TIM_TS_ITR2) || \ 887 ((__SELECTION__) == TIM_TS_ITR3) || \ 888 ((__SELECTION__) == TIM_TS_ITR4) || \ 889 ((__SELECTION__) == TIM_TS_ITR5) || \ 890 ((__SELECTION__) == TIM_TS_ITR6) || \ 891 ((__SELECTION__) == TIM_TS_ITR7) || \ 892 ((__SELECTION__) == TIM_TS_ITR8) || \ 893 ((__SELECTION__) == TIM_TS_ITR9) || \ 894 ((__SELECTION__) == TIM_TS_ITR10) || \ 895 ((__SELECTION__) == TIM_TS_ITR11) || \ 896 ((__SELECTION__) == TIM_TS_ITR12) || \ 897 ((__SELECTION__) == TIM_TS_NONE))) \ 898 || \ 899 (((INSTANCE) == TIM3) && \ 900 (((__SELECTION__) == TIM_TS_ITR0) || \ 901 ((__SELECTION__) == TIM_TS_ITR1) || \ 902 ((__SELECTION__) == TIM_TS_ITR3) || \ 903 ((__SELECTION__) == TIM_TS_ITR4) || \ 904 ((__SELECTION__) == TIM_TS_ITR5) || \ 905 ((__SELECTION__) == TIM_TS_ITR6) || \ 906 ((__SELECTION__) == TIM_TS_ITR7) || \ 907 ((__SELECTION__) == TIM_TS_ITR8) || \ 908 ((__SELECTION__) == TIM_TS_ITR9) || \ 909 ((__SELECTION__) == TIM_TS_ITR10) || \ 910 ((__SELECTION__) == TIM_TS_ITR11) || \ 911 ((__SELECTION__) == TIM_TS_ITR12) || \ 912 ((__SELECTION__) == TIM_TS_NONE))) \ 913 || \ 914 (((INSTANCE) == TIM4) && \ 915 (((__SELECTION__) == TIM_TS_ITR0) || \ 916 ((__SELECTION__) == TIM_TS_ITR1) || \ 917 ((__SELECTION__) == TIM_TS_ITR2) || \ 918 ((__SELECTION__) == TIM_TS_ITR4) || \ 919 ((__SELECTION__) == TIM_TS_ITR5) || \ 920 ((__SELECTION__) == TIM_TS_ITR6) || \ 921 ((__SELECTION__) == TIM_TS_ITR7) || \ 922 ((__SELECTION__) == TIM_TS_ITR8) || \ 923 ((__SELECTION__) == TIM_TS_ITR9) || \ 924 ((__SELECTION__) == TIM_TS_ITR10) || \ 925 ((__SELECTION__) == TIM_TS_ITR11) || \ 926 ((__SELECTION__) == TIM_TS_ITR12) || \ 927 ((__SELECTION__) == TIM_TS_NONE))) \ 928 || \ 929 (((INSTANCE) == TIM5) && \ 930 (((__SELECTION__) == TIM_TS_ITR0) || \ 931 ((__SELECTION__) == TIM_TS_ITR1) || \ 932 ((__SELECTION__) == TIM_TS_ITR2) || \ 933 ((__SELECTION__) == TIM_TS_ITR3) || \ 934 ((__SELECTION__) == TIM_TS_ITR5) || \ 935 ((__SELECTION__) == TIM_TS_ITR6) || \ 936 ((__SELECTION__) == TIM_TS_ITR7) || \ 937 ((__SELECTION__) == TIM_TS_ITR8) || \ 938 ((__SELECTION__) == TIM_TS_ITR9) || \ 939 ((__SELECTION__) == TIM_TS_ITR10) || \ 940 ((__SELECTION__) == TIM_TS_ITR11) || \ 941 ((__SELECTION__) == TIM_TS_ITR12) || \ 942 ((__SELECTION__) == TIM_TS_ITR13) || \ 943 ((__SELECTION__) == TIM_TS_NONE))) \ 944 || \ 945 (((INSTANCE) == TIM8) && \ 946 (((__SELECTION__) == TIM_TS_ITR0) || \ 947 ((__SELECTION__) == TIM_TS_ITR1) || \ 948 ((__SELECTION__) == TIM_TS_ITR2) || \ 949 ((__SELECTION__) == TIM_TS_ITR3) || \ 950 ((__SELECTION__) == TIM_TS_ITR4) || \ 951 ((__SELECTION__) == TIM_TS_ITR6) || \ 952 ((__SELECTION__) == TIM_TS_ITR7) || \ 953 ((__SELECTION__) == TIM_TS_ITR8) || \ 954 ((__SELECTION__) == TIM_TS_ITR9) || \ 955 ((__SELECTION__) == TIM_TS_ITR10) || \ 956 ((__SELECTION__) == TIM_TS_ITR11) || \ 957 ((__SELECTION__) == TIM_TS_ITR12) || \ 958 ((__SELECTION__) == TIM_TS_NONE))) \ 959 || \ 960 (((INSTANCE) == TIM9) && \ 961 (((__SELECTION__) == TIM_TS_ITR0) || \ 962 ((__SELECTION__) == TIM_TS_ITR1) || \ 963 ((__SELECTION__) == TIM_TS_ITR2) || \ 964 ((__SELECTION__) == TIM_TS_ITR3) || \ 965 ((__SELECTION__) == TIM_TS_ITR4) || \ 966 ((__SELECTION__) == TIM_TS_ITR5) || \ 967 ((__SELECTION__) == TIM_TS_ITR7) || \ 968 ((__SELECTION__) == TIM_TS_ITR8) || \ 969 ((__SELECTION__) == TIM_TS_ITR9) || \ 970 ((__SELECTION__) == TIM_TS_ITR10) || \ 971 ((__SELECTION__) == TIM_TS_ITR11) || \ 972 ((__SELECTION__) == TIM_TS_ITR12) || \ 973 ((__SELECTION__) == TIM_TS_NONE))) \ 974 || \ 975 (((INSTANCE) == TIM12) && \ 976 (((__SELECTION__) == TIM_TS_ITR0) || \ 977 ((__SELECTION__) == TIM_TS_ITR1) || \ 978 ((__SELECTION__) == TIM_TS_ITR2) || \ 979 ((__SELECTION__) == TIM_TS_ITR3) || \ 980 ((__SELECTION__) == TIM_TS_ITR4) || \ 981 ((__SELECTION__) == TIM_TS_ITR5) || \ 982 ((__SELECTION__) == TIM_TS_ITR6) || \ 983 ((__SELECTION__) == TIM_TS_ITR8) || \ 984 ((__SELECTION__) == TIM_TS_ITR9) || \ 985 ((__SELECTION__) == TIM_TS_ITR10) || \ 986 ((__SELECTION__) == TIM_TS_ITR11) || \ 987 ((__SELECTION__) == TIM_TS_ITR12) || \ 988 ((__SELECTION__) == TIM_TS_NONE))) \ 989 || \ 990 (((INSTANCE) == TIM15) && \ 991 (((__SELECTION__) == TIM_TS_ITR0) || \ 992 ((__SELECTION__) == TIM_TS_ITR1) || \ 993 ((__SELECTION__) == TIM_TS_ITR2) || \ 994 ((__SELECTION__) == TIM_TS_ITR3) || \ 995 ((__SELECTION__) == TIM_TS_ITR4) || \ 996 ((__SELECTION__) == TIM_TS_ITR5) || \ 997 ((__SELECTION__) == TIM_TS_ITR6) || \ 998 ((__SELECTION__) == TIM_TS_ITR7) || \ 999 ((__SELECTION__) == TIM_TS_ITR8) || \ 1000 ((__SELECTION__) == TIM_TS_ITR9) || \ 1001 ((__SELECTION__) == TIM_TS_ITR11) || \ 1002 ((__SELECTION__) == TIM_TS_ITR12) || \ 1003 ((__SELECTION__) == TIM_TS_NONE)))) 1004 1005 #define IS_TIM_OC_CHANNEL_MODE(__MODE__, __CHANNEL__) \ 1006 (IS_TIM_OC_MODE(__MODE__) \ 1007 && ((((__MODE__) == TIM_OCMODE_DIRECTION_OUTPUT) || ((__MODE__) == TIM_OCMODE_PULSE_ON_COMPARE)) \ 1008 ? (((__CHANNEL__) == TIM_CHANNEL_3) || ((__CHANNEL__) == TIM_CHANNEL_4)) : (1 == 1))) 1009 1010 #define IS_TIM_PULSEONCOMPARE_CHANNEL(__CHANNEL__) \ 1011 (((__CHANNEL__) == TIM_CHANNEL_3) || \ 1012 ((__CHANNEL__) == TIM_CHANNEL_4)) 1013 1014 #define IS_TIM_PULSEONCOMPARE_INSTANCE(INSTANCE) IS_TIM_CC3_INSTANCE(INSTANCE) 1015 1016 #define IS_TIM_PULSEONCOMPARE_WIDTH(__WIDTH__) ((__WIDTH__) <= 0xFFU) 1017 1018 #define IS_TIM_PULSEONCOMPARE_WIDTHPRESCALER(__PRESCALER__) ((__PRESCALER__) <= 0x7U) 1019 1020 #define IS_TIM_SLAVE_PRELOAD_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_UPDATE) \ 1021 || ((__SOURCE__) == TIM_SMS_PRELOAD_SOURCE_INDEX)) 1022 1023 #define IS_TIM_ENCODERINDEX_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_INVERTED) || \ 1024 ((__POLARITY__) == TIM_ENCODERINDEX_POLARITY_NONINVERTED)) 1025 1026 #define IS_TIM_ENCODERINDEX_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV1) || \ 1027 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV2) || \ 1028 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV4) || \ 1029 ((__PRESCALER__) == TIM_ENCODERINDEX_PRESCALER_DIV8)) 1030 1031 #define IS_TIM_ENCODERINDEX_FILTER(__FILTER__) ((__FILTER__) <= 0xFUL) 1032 1033 #define IS_TIM_ENCODERINDEX_POSITION(__POSITION__) (((__POSITION__) == TIM_ENCODERINDEX_POSITION_00) || \ 1034 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_01) || \ 1035 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_10) || \ 1036 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_11) || \ 1037 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_0) || \ 1038 ((__POSITION__) == TIM_ENCODERINDEX_POSITION_1)) 1039 1040 #define IS_TIM_ENCODERINDEX_DIRECTION(__DIRECTION__) (((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP_DOWN) || \ 1041 ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP) || \ 1042 ((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_DOWN)) 1043 1044 #define IS_TIM_ENCODERINDEX_BLANKING(__BLANKING__) (((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_DISABLE) || \ 1045 ((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_TI3) || \ 1046 ((__BLANKING__) == TIM_ENCODERINDEX_BLANKING_TI4)) 1047 1048 /** 1049 * @} 1050 */ 1051 /* End of private macro ------------------------------------------------------*/ 1052 1053 /* Exported functions --------------------------------------------------------*/ 1054 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 1055 * @{ 1056 */ 1057 1058 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 1059 * @brief Timer Hall Sensor functions 1060 * @{ 1061 */ 1062 /* Timer Hall Sensor functions **********************************************/ 1063 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig); 1064 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 1065 1066 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 1067 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 1068 1069 /* Blocking mode: Polling */ 1070 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 1071 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 1072 /* Non-Blocking mode: Interrupt */ 1073 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 1074 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 1075 /* Non-Blocking mode: DMA */ 1076 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 1077 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 1078 /** 1079 * @} 1080 */ 1081 1082 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 1083 * @brief Timer Complementary Output Compare functions 1084 * @{ 1085 */ 1086 /* Timer Complementary Output Compare functions *****************************/ 1087 /* Blocking mode: Polling */ 1088 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 1089 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 1090 1091 /* Non-Blocking mode: Interrupt */ 1092 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1093 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1094 1095 /* Non-Blocking mode: DMA */ 1096 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 1097 uint16_t Length); 1098 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 1099 /** 1100 * @} 1101 */ 1102 1103 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 1104 * @brief Timer Complementary PWM functions 1105 * @{ 1106 */ 1107 /* Timer Complementary PWM functions ****************************************/ 1108 /* Blocking mode: Polling */ 1109 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 1110 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 1111 1112 /* Non-Blocking mode: Interrupt */ 1113 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1114 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 1115 /* Non-Blocking mode: DMA */ 1116 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 1117 uint16_t Length); 1118 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 1119 /** 1120 * @} 1121 */ 1122 1123 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 1124 * @brief Timer Complementary One Pulse functions 1125 * @{ 1126 */ 1127 /* Timer Complementary One Pulse functions **********************************/ 1128 /* Blocking mode: Polling */ 1129 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 1130 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 1131 1132 /* Non-Blocking mode: Interrupt */ 1133 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 1134 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 1135 /** 1136 * @} 1137 */ 1138 1139 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 1140 * @brief Peripheral Control functions 1141 * @{ 1142 */ 1143 /* Extended Control functions ************************************************/ 1144 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 1145 uint32_t CommutationSource); 1146 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 1147 uint32_t CommutationSource); 1148 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 1149 uint32_t CommutationSource); 1150 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 1151 const TIM_MasterConfigTypeDef *sMasterConfig); 1152 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 1153 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 1154 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, 1155 const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 1156 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 1157 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 1158 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel); 1159 1160 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 1161 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef *htim, uint32_t BreakInput); 1162 HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim); 1163 HAL_StatusTypeDef HAL_TIMEx_DitheringDisable(TIM_HandleTypeDef *htim); 1164 HAL_StatusTypeDef HAL_TIMEx_OC_ConfigPulseOnCompare(TIM_HandleTypeDef *htim, uint32_t PulseWidthPrescaler, 1165 uint32_t PulseWidth); 1166 HAL_StatusTypeDef HAL_TIMEx_ConfigSlaveModePreload(TIM_HandleTypeDef *htim, uint32_t Source); 1167 HAL_StatusTypeDef HAL_TIMEx_EnableSlaveModePreload(TIM_HandleTypeDef *htim); 1168 HAL_StatusTypeDef HAL_TIMEx_DisableSlaveModePreload(TIM_HandleTypeDef *htim); 1169 HAL_StatusTypeDef HAL_TIMEx_EnableDeadTimePreload(TIM_HandleTypeDef *htim); 1170 HAL_StatusTypeDef HAL_TIMEx_DisableDeadTimePreload(TIM_HandleTypeDef *htim); 1171 HAL_StatusTypeDef HAL_TIMEx_ConfigDeadTime(TIM_HandleTypeDef *htim, uint32_t Deadtime); 1172 HAL_StatusTypeDef HAL_TIMEx_ConfigAsymmetricalDeadTime(TIM_HandleTypeDef *htim, uint32_t FallingDeadtime); 1173 HAL_StatusTypeDef HAL_TIMEx_EnableAsymmetricalDeadTime(TIM_HandleTypeDef *htim); 1174 HAL_StatusTypeDef HAL_TIMEx_DisableAsymmetricalDeadTime(TIM_HandleTypeDef *htim); 1175 HAL_StatusTypeDef HAL_TIMEx_ConfigEncoderIndex(TIM_HandleTypeDef *htim, 1176 TIMEx_EncoderIndexConfigTypeDef *sEncoderIndexConfig); 1177 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderIndex(TIM_HandleTypeDef *htim); 1178 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderIndex(TIM_HandleTypeDef *htim); 1179 HAL_StatusTypeDef HAL_TIMEx_EnableEncoderFirstIndex(TIM_HandleTypeDef *htim); 1180 HAL_StatusTypeDef HAL_TIMEx_DisableEncoderFirstIndex(TIM_HandleTypeDef *htim); 1181 1182 HAL_StatusTypeDef HAL_TIMEx_EnableADCSynchronization(TIM_HandleTypeDef *htim); 1183 HAL_StatusTypeDef HAL_TIMEx_DisableADCSynchronization(TIM_HandleTypeDef *htim); 1184 /** 1185 * @} 1186 */ 1187 1188 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 1189 * @brief Extended Callbacks functions 1190 * @{ 1191 */ 1192 /* Extended Callback **********************************************************/ 1193 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 1194 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 1195 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 1196 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 1197 void HAL_TIMEx_EncoderIndexCallback(TIM_HandleTypeDef *htim); 1198 void HAL_TIMEx_DirectionChangeCallback(TIM_HandleTypeDef *htim); 1199 void HAL_TIMEx_IndexErrorCallback(TIM_HandleTypeDef *htim); 1200 void HAL_TIMEx_TransitionErrorCallback(TIM_HandleTypeDef *htim); 1201 /** 1202 * @} 1203 */ 1204 1205 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 1206 * @brief Extended Peripheral State functions 1207 * @{ 1208 */ 1209 /* Extended Peripheral State functions ***************************************/ 1210 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim); 1211 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN); 1212 /** 1213 * @} 1214 */ 1215 1216 /** 1217 * @} 1218 */ 1219 /* End of exported functions -------------------------------------------------*/ 1220 1221 /* Private functions----------------------------------------------------------*/ 1222 /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions 1223 * @{ 1224 */ 1225 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 1226 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 1227 /** 1228 * @} 1229 */ 1230 /* End of private functions --------------------------------------------------*/ 1231 1232 /** 1233 * @} 1234 */ 1235 1236 /** 1237 * @} 1238 */ 1239 1240 #ifdef __cplusplus 1241 } 1242 #endif 1243 1244 1245 #endif /* STM32N6xx_HAL_TIM_EX_H */ 1246
