Searched refs:TIM8_OR1_ETR_ADC3_RMP_Pos (Results 1 – 7 of 7) sorted by relevance
14391 #define TIM8_OR1_ETR_ADC3_RMP_Pos (2U) macro14392 #define TIM8_OR1_ETR_ADC3_RMP_Msk (0x3UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x0000000C */14394 #define TIM8_OR1_ETR_ADC3_RMP_0 (0x1UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000004 */14395 #define TIM8_OR1_ETR_ADC3_RMP_1 (0x2UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000008 */
14555 #define TIM8_OR1_ETR_ADC3_RMP_Pos (2U) macro14556 #define TIM8_OR1_ETR_ADC3_RMP_Msk (0x3UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x0000000C */14558 #define TIM8_OR1_ETR_ADC3_RMP_0 (0x1UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000004 */14559 #define TIM8_OR1_ETR_ADC3_RMP_1 (0x2UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000008 */
14712 #define TIM8_OR1_ETR_ADC3_RMP_Pos (2U) macro14713 #define TIM8_OR1_ETR_ADC3_RMP_Msk (0x3UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x0000000C */14715 #define TIM8_OR1_ETR_ADC3_RMP_0 (0x1UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000004 */14716 #define TIM8_OR1_ETR_ADC3_RMP_1 (0x2UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000008 */
14931 #define TIM8_OR1_ETR_ADC3_RMP_Pos (2U) macro14932 #define TIM8_OR1_ETR_ADC3_RMP_Msk (0x3UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x0000000C */14934 #define TIM8_OR1_ETR_ADC3_RMP_0 (0x1UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000004 */14935 #define TIM8_OR1_ETR_ADC3_RMP_1 (0x2UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000008 */
14780 #define TIM8_OR1_ETR_ADC3_RMP_Pos (2U) macro14781 #define TIM8_OR1_ETR_ADC3_RMP_Msk (0x3UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x0000000C */14783 #define TIM8_OR1_ETR_ADC3_RMP_0 (0x1UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000004 */14784 #define TIM8_OR1_ETR_ADC3_RMP_1 (0x2UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000008 */
16262 #define TIM8_OR1_ETR_ADC3_RMP_Pos (2U) macro16263 #define TIM8_OR1_ETR_ADC3_RMP_Msk (0x3UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x0000000C */16265 #define TIM8_OR1_ETR_ADC3_RMP_0 (0x1UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000004 */16266 #define TIM8_OR1_ETR_ADC3_RMP_1 (0x2UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000008 */
15922 #define TIM8_OR1_ETR_ADC3_RMP_Pos (2U) macro15923 #define TIM8_OR1_ETR_ADC3_RMP_Msk (0x3UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x0000000C */15925 #define TIM8_OR1_ETR_ADC3_RMP_0 (0x1UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000004 */15926 #define TIM8_OR1_ETR_ADC3_RMP_1 (0x2UL << TIM8_OR1_ETR_ADC3_RMP_Pos) /*!< 0x00000008 */
