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Searched refs:TIM5_AF1_ETRSEL_2 (Results 1 – 25 of 46) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h18462 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h7b0xx.h18942 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h7b0xxq.h18954 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h7a3xxq.h18474 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h7b3xx.h18949 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h7b3xxq.h18961 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h730xxq.h20642 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h733xx.h20630 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h725xx.h20155 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h730xx.h20630 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h735xx.h20642 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h742xx.h19552 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h723xx.h20143 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h750xx.h20481 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h753xx.h20487 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h745xx.h20862 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h745xg.h20862 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h743xx.h20200 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h755xx.h21149 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h757xx.h24322 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h747xg.h24035 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32h747xx.h24035 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h32863 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32mp151fxx_cm4.h33026 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro
Dstm32mp151axx_ca7.h32863 #define TIM5_AF1_ETRSEL_2 (0x4UL << TIM5_AF1_ETRSEL_Pos) /*!< 0x00010000 */ macro

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