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Searched refs:TIM2_AF1_ETRSEL_1 (Results 1 – 25 of 74) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_tim_ex.h113 #define TIM_TIM2_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /*!< TIM2_ETR is connected…
114 #define TIM_TIM2_ETR_RCC_LSE (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /*!< TIM2_ETR is connected…
129 #define TIM_TIM23_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /*!< TIM23_ETR is connected to COMP2 OUT */
134 #define TIM_TIM24_ETR_SAI1_FSA (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /*!< TIM24_ETR is conn…
Dstm32h7xx_ll_tim.h1013 #define LL_TIM_TIM2_ETRSOURCE_COMP2 (TIM2_AF1_ETRSEL_1) …
1014 #define LL_TIM_TIM2_ETRSOURCE_RCC_LSE (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) …
1029 #define LL_TIM_TIM23_ETRSOURCE_COMP2 (TIM2_AF1_ETRSEL_1) …
1034 #define LL_TIM_TIM24_ETRSOURCE_SAI1_FSA (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) …
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_tim_ex.h108 #define TIM_TIM2_ETR_RCC_LSE (TIM2_AF1_ETRSEL_1 | TIM2_AF1_ETRSEL_0) /* !< …
111 #define TIM_TIM2_ETR_ETH_PPS (TIM2_AF1_ETRSEL_2 | TIM2_AF1_ETRSEL_1) /* !< …
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_tim_ex.h102 #define TIM_TIM2_ETR_COMP2 TIM2_AF1_ETRSEL_1 /*!< TIM2_ETR is co…
103 #define TIM_TIM2_ETR_LSE (TIM2_AF1_ETRSEL_1 | TIM2_AF1_ETRSEL_0) /*!< TIM2_ETR is co…
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_tim_ex.h101 #define TIM_TIM2_ETR_COMP2 TIM2_AF1_ETRSEL_1 /*!< TIM2…
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_tim_ex.h115 #define TIM_TIM2_ETR_COMP2 TIM2_AF1_ETRSEL_1 /*!< TIM2…
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h6568 #define TIM2_AF1_ETRSEL_1 (0x2UL << TIM2_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g031xx.h6746 #define TIM2_AF1_ETRSEL_1 (0x2UL << TIM2_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g041xx.h7050 #define TIM2_AF1_ETRSEL_1 (0x2UL << TIM2_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g051xx.h7145 #define TIM2_AF1_ETRSEL_1 (0x2UL << TIM2_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g061xx.h7449 #define TIM2_AF1_ETRSEL_1 (0x2UL << TIM2_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g071xx.h7529 #define TIM2_AF1_ETRSEL_1 (0x2UL << TIM2_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g081xx.h7833 #define TIM2_AF1_ETRSEL_1 (0x2UL << TIM2_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g0c1xx.h9381 #define TIM2_AF1_ETRSEL_1 (0x2UL << TIM2_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g0b1xx.h9077 #define TIM2_AF1_ETRSEL_1 (0x2UL << TIM2_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h9393 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro
Dstm32wle5xx.h9393 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro
Dstm32wl5mxx.h11065 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro
Dstm32wl54xx.h11065 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro
Dstm32wl55xx.h11065 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h9573 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro
Dstm32wb1mxx.h9592 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro
Dstm32wb30xx.h9569 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h9420 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro
Dstm32wb15xx.h9592 #define TIM2_AF1_ETRSEL_1 (0x000008000) /*!< Bit_1 */ macro

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