Searched refs:TIM21_OR_ETR_RMP_Pos (Results 1 – 19 of 19) sorted by relevance
5494 #define TIM21_OR_ETR_RMP_Pos (0U) macro5495 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5497 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5498 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5152 #define TIM21_OR_ETR_RMP_Pos (0U) macro5153 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5155 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5156 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5200 #define TIM21_OR_ETR_RMP_Pos (0U) macro5201 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5203 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5204 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5234 #define TIM21_OR_ETR_RMP_Pos (0U) macro5235 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5237 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5238 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5371 #define TIM21_OR_ETR_RMP_Pos (0U) macro5372 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5374 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5375 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5357 #define TIM21_OR_ETR_RMP_Pos (0U) macro5358 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5360 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5361 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5511 #define TIM21_OR_ETR_RMP_Pos (0U) macro5512 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5514 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5515 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5107 #define TIM21_OR_ETR_RMP_Pos (0U) macro5108 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5110 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5111 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5159 #define TIM21_OR_ETR_RMP_Pos (0U) macro5160 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5162 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5163 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5825 #define TIM21_OR_ETR_RMP_Pos (0U) macro5826 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5828 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5829 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5688 #define TIM21_OR_ETR_RMP_Pos (0U) macro5689 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5691 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5692 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
5910 #define TIM21_OR_ETR_RMP_Pos (0U) macro5911 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */5913 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */5914 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
6047 #define TIM21_OR_ETR_RMP_Pos (0U) macro6048 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */6050 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */6051 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
6069 #define TIM21_OR_ETR_RMP_Pos (0U) macro6070 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */6072 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */6073 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
6191 #define TIM21_OR_ETR_RMP_Pos (0U) macro6192 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */6194 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */6195 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
6350 #define TIM21_OR_ETR_RMP_Pos (0U) macro6351 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */6353 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */6354 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
6487 #define TIM21_OR_ETR_RMP_Pos (0U) macro6488 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */6490 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */6491 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
6204 #define TIM21_OR_ETR_RMP_Pos (0U) macro6205 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */6207 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */6208 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
6328 #define TIM21_OR_ETR_RMP_Pos (0U) macro6329 #define TIM21_OR_ETR_RMP_Msk (0x3UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000003 */6331 #define TIM21_OR_ETR_RMP_0 (0x1UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000001 */6332 #define TIM21_OR_ETR_RMP_1 (0x2UL << TIM21_OR_ETR_RMP_Pos) /*!< 0x00000002 */
