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Searched refs:TAMP_SMCR_BKPWDPROT_Pos (Results 1 – 25 of 30) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_rtc_ex.c2703 …te->backupRegisterStartZone3 = READ_BIT(tamp_smcr, TAMP_SMCR_BKPWDPROT) >> TAMP_SMCR_BKPWDPROT_Pos; in HAL_RTCEx_SecureModeGet()
2734 … (TAMP_SMCR_BKPWDPROT & (secureState->backupRegisterStartZone3 << TAMP_SMCR_BKPWDPROT_Pos))); in HAL_RTCEx_SecureModeSet()
2790 …AMP_SMCR_BKPRWDPROT_Pos) | (privilegeState->backupRegisterStartZone3 << TAMP_SMCR_BKPWDPROT_Pos))); in HAL_RTCEx_PrivilegeModeSet()
2825 …te->backupRegisterStartZone3 = READ_BIT(tamp_smcr, TAMP_SMCR_BKPWDPROT) >> TAMP_SMCR_BKPWDPROT_Pos; in HAL_RTCEx_PrivilegeModeGet()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_rtc_ex.c2420 …te->backupRegisterStartZone3 = READ_BIT(tamp_smcr, TAMP_SMCR_BKPWDPROT) >> TAMP_SMCR_BKPWDPROT_Pos; in HAL_RTCEx_SecureModeGet()
2451 … (TAMP_SMCR_BKPWDPROT & (secureState->backupRegisterStartZone3 << TAMP_SMCR_BKPWDPROT_Pos))); in HAL_RTCEx_SecureModeSet()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_rtc.h4214 …KPWDPROT_Msk), (startZone2 << TAMP_SMCR_BKPRWDPROT_Pos) | (startZone3 << TAMP_SMCR_BKPWDPROT_Pos)); in LL_RTC_SetBackupRegProtection()
4244 return READ_BIT(TAMP->SMCR, TAMP_SMCR_BKPWDPROT_Msk) >> TAMP_SMCR_BKPWDPROT_Pos; in LL_RTC_GetBackupRegProtectionStartZone3()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_rtc.h4775 …KPWDPROT_Msk), (startZone2 << TAMP_SMCR_BKPRWDPROT_Pos) | (startZone3 << TAMP_SMCR_BKPWDPROT_Pos)); in LL_RTC_SetBackupRegProtection()
4805 return READ_BIT(TAMP->SMCR, TAMP_SMCR_BKPWDPROT_Msk) >> TAMP_SMCR_BKPWDPROT_Pos; in LL_RTC_GetBackupRegProtectionStartZone3()
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h13752 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
13753 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
13755 #define TAMP_SMCR_BKPWDPROT_0 (0x1UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
13756 #define TAMP_SMCR_BKPWDPROT_1 (0x2UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
13757 #define TAMP_SMCR_BKPWDPROT_2 (0x4UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
13758 #define TAMP_SMCR_BKPWDPROT_3 (0x8UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
13759 #define TAMP_SMCR_BKPWDPROT_4 (0x1UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
13760 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
13761 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
13762 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32l562xx.h14491 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
14492 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
14494 #define TAMP_SMCR_BKPWDPROT_0 (0x1UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
14495 #define TAMP_SMCR_BKPWDPROT_1 (0x2UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
14496 #define TAMP_SMCR_BKPWDPROT_2 (0x4UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
14497 #define TAMP_SMCR_BKPWDPROT_3 (0x8UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
14498 #define TAMP_SMCR_BKPWDPROT_4 (0x1UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
14499 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
14500 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
14501 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h29284 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
29285 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
29287 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
29288 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
29289 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
29290 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
29291 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
29292 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
29293 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
29294 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp151fxx_cm4.h29447 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
29448 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
29450 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
29451 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
29452 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
29453 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
29454 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
29455 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
29456 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
29457 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp151axx_ca7.h29284 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
29285 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
29287 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
29288 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
29289 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
29290 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
29291 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
29292 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
29293 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
29294 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp151axx_cm4.h29250 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
29251 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
29253 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
29254 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
29255 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
29256 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
29257 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
29258 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
29259 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
29260 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp151dxx_cm4.h29250 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
29251 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
29253 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
29254 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
29255 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
29256 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
29257 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
29258 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
29259 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
29260 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp151cxx_ca7.h29481 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
29482 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
29484 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
29485 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
29486 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
29487 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
29488 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
29489 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
29490 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
29491 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp151cxx_cm4.h29447 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
29448 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
29450 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
29451 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
29452 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
29453 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
29454 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
29455 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
29456 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
29457 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp151fxx_ca7.h29481 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
29482 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
29484 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
29485 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
29486 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
29487 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
29488 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
29489 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
29490 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
29491 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp153axx_ca7.h30835 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
30836 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
30838 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
30839 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
30840 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
30841 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
30842 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
30843 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
30844 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
30845 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp153axx_cm4.h30801 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
30802 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
30804 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
30805 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
30806 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
30807 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
30808 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
30809 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
30810 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
30811 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp153cxx_ca7.h31032 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
31033 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
31035 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
31036 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
31037 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
31038 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
31039 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
31040 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
31041 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
31042 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp153cxx_cm4.h30998 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
30999 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
31001 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
31002 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
31003 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
31004 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
31005 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
31006 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
31007 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
31008 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp153dxx_ca7.h30835 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
30836 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
30838 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
30839 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
30840 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
30841 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
30842 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
30843 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
30844 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
30845 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp153dxx_cm4.h30801 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
30802 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
30804 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
30805 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
30806 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
30807 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
30808 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
30809 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
30810 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
30811 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp153fxx_ca7.h31032 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
31033 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
31035 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
31036 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
31037 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
31038 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
31039 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
31040 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
31041 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
31042 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp153fxx_cm4.h30998 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
30999 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
31001 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
31002 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
31003 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
31004 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
31005 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
31006 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
31007 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
31008 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp157axx_ca7.h32058 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
32059 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
32061 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
32062 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
32063 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
32064 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
32065 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
32066 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
32067 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
32068 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp157axx_cm4.h32024 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
32025 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
32027 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
32028 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
32029 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
32030 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
32031 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
32032 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
32033 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
32034 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */
Dstm32mp157cxx_ca7.h32255 #define TAMP_SMCR_BKPWDPROT_Pos (16U) macro
32256 #define TAMP_SMCR_BKPWDPROT_Msk (0xFFUL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00FF0000 */
32258 #define TAMP_SMCR_BKPWDPROT_0 (0x01UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00010000 */
32259 #define TAMP_SMCR_BKPWDPROT_1 (0x02UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00020000 */
32260 #define TAMP_SMCR_BKPWDPROT_2 (0x04UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00040000 */
32261 #define TAMP_SMCR_BKPWDPROT_3 (0x08UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00080000 */
32262 #define TAMP_SMCR_BKPWDPROT_4 (0x10UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00100000 */
32263 #define TAMP_SMCR_BKPWDPROT_5 (0x20UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00200000 */
32264 #define TAMP_SMCR_BKPWDPROT_6 (0x40UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00400000 */
32265 #define TAMP_SMCR_BKPWDPROT_7 (0x80UL << TAMP_SMCR_BKPWDPROT_Pos) /*!< 0x00800000 */

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