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Searched refs:SRAM1_BASE_S (Results 1 – 25 of 28) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dsystem_stm32l5xx_s.c160 #define VECT_TAB_BASE_ADDRESS SRAM1_BASE_S /*!< Vector Table base address field.
Dstm32l552xx.h1512 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1(up to 192 KB) base address */ macro
1514 #define SRAM_BASE_S SRAM1_BASE_S
2075 #define SRAM1_BASE SRAM1_BASE_S
2077 #define SRAM_BASE SRAM1_BASE_S
Dstm32l562xx.h1593 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1(up to 192 KB) base address */ macro
1595 #define SRAM_BASE_S SRAM1_BASE_S
2177 #define SRAM1_BASE SRAM1_BASE_S
2179 #define SRAM_BASE SRAM1_BASE_S
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_gtzc.c711 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
856 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_gtzc.c858 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
953 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_gtzc.c1061 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1206 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_gtzc.c1131 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_ConfigMemAttributes()
1312 base_address = SRAM1_BASE_S; in HAL_GTZC_MPCBB_GetConfigMemAttributes()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h1100 #define SRAM1_BASE_S 0x30000000UL /*!< SRAM1 secure base address … macro
1377 #define SRAM1_BASE SRAM1_BASE_S
Dstm32wba54xx.h1169 #define SRAM1_BASE_S 0x30000000UL /*!< SRAM1 secure base address … macro
1467 #define SRAM1_BASE SRAM1_BASE_S
Dstm32wba5mxx.h1169 #define SRAM1_BASE_S 0x30000000UL /*!< SRAM1 secure base address … macro
1467 #define SRAM1_BASE SRAM1_BASE_S
Dstm32wba55xx.h1169 #define SRAM1_BASE_S 0x30000000UL /*!< SRAM1 secure base address … macro
1467 #define SRAM1_BASE SRAM1_BASE_S
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h1638 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (128 KB) secure base address */ macro
2249 #define SRAM1_BASE SRAM1_BASE_S
Dstm32h562xx.h1752 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (256 KB) secure base address */ macro
2436 #define SRAM1_BASE SRAM1_BASE_S
Dstm32h533xx.h1709 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (128 KB) secure base address */ macro
2365 #define SRAM1_BASE SRAM1_BASE_S
Dstm32h573xx.h2006 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (256 KB) secure base address */ macro
2750 #define SRAM1_BASE SRAM1_BASE_S
Dstm32h563xx.h1935 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (256 KB) secure base address */ macro
2634 #define SRAM1_BASE SRAM1_BASE_S
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h1675 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (192 KB) secure base address */ macro
2207 #define SRAM1_BASE SRAM1_BASE_S
Dstm32u535xx.h1588 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (192 KB) secure base address */ macro
2095 #define SRAM1_BASE SRAM1_BASE_S
Dstm32u575xx.h1824 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (192 KB) secure base address */ macro
2403 #define SRAM1_BASE SRAM1_BASE_S
Dstm32u585xx.h1917 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (192 KB) secure base address */ macro
2536 #define SRAM1_BASE SRAM1_BASE_S
Dstm32u595xx.h1884 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (768 KB) secure base address */ macro
2488 #define SRAM1_BASE SRAM1_BASE_S
Dstm32u5a5xx.h1977 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (768 KB) secure base address */ macro
2621 #define SRAM1_BASE SRAM1_BASE_S
Dstm32u5f7xx.h2064 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (768 KB) secure base address */ macro
2703 #define SRAM1_BASE SRAM1_BASE_S
Dstm32u599xx.h2080 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (768 KB) secure base address */ macro
2715 #define SRAM1_BASE SRAM1_BASE_S
Dstm32u5g7xx.h2157 #define SRAM1_BASE_S (0x30000000UL) /*!< SRAM1 (768 KB) secure base address */ macro
2836 #define SRAM1_BASE SRAM1_BASE_S

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