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Searched refs:SPI_IFCR_OVRC_Pos (Results 1 – 25 of 77) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h7483 #define SPI_IFCR_OVRC_Pos (6U) macro
7484 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32wba52xx.h11486 #define SPI_IFCR_OVRC_Pos (6U) macro
11487 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32wba54xx.h12194 #define SPI_IFCR_OVRC_Pos (6U) macro
12195 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32wba5mxx.h12212 #define SPI_IFCR_OVRC_Pos (6U) macro
12213 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32wba55xx.h12212 #define SPI_IFCR_OVRC_Pos (6U) macro
12213 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h12700 #define SPI_IFCR_OVRC_Pos (6U) macro
12701 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32h523xx.h18686 #define SPI_IFCR_OVRC_Pos (6U) macro
18687 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32h562xx.h20230 #define SPI_IFCR_OVRC_Pos (6U) macro
20231 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32h533xx.h19279 #define SPI_IFCR_OVRC_Pos (6U) macro
19280 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h17001 #define SPI_IFCR_OVRC_Pos (6U) macro
17002 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h7b0xx.h17481 #define SPI_IFCR_OVRC_Pos (6U) macro
17482 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h7b0xxq.h17493 #define SPI_IFCR_OVRC_Pos (6U) macro
17494 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h7a3xxq.h17013 #define SPI_IFCR_OVRC_Pos (6U) macro
17014 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h7b3xx.h17488 #define SPI_IFCR_OVRC_Pos (6U) macro
17489 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h7b3xxq.h17500 #define SPI_IFCR_OVRC_Pos (6U) macro
17501 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h730xxq.h19067 #define SPI_IFCR_OVRC_Pos (6U) macro
19068 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h733xx.h19055 #define SPI_IFCR_OVRC_Pos (6U) macro
19056 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h725xx.h18580 #define SPI_IFCR_OVRC_Pos (6U) macro
18581 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h730xx.h19055 #define SPI_IFCR_OVRC_Pos (6U) macro
19056 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
Dstm32h735xx.h19067 #define SPI_IFCR_OVRC_Pos (6U) macro
19068 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h20817 #define SPI_IFCR_OVRC_Pos (6U) macro
20818 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32u535xx.h20221 #define SPI_IFCR_OVRC_Pos (6U) macro
20222 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32u575xx.h23356 #define SPI_IFCR_OVRC_Pos (6U) macro
23357 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h18724 #define SPI_IFCR_OVRC_Pos (6U) macro
18725 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…
Dstm32h7s7xx.h20039 #define SPI_IFCR_OVRC_Pos (6U) macro
20040 #define SPI_IFCR_OVRC_Msk (0x1UL << SPI_IFCR_OVRC_Pos) /*!< 0x00000040…

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