Home
last modified time | relevance | path

Searched refs:SPI_IFCR_CRCEC_Pos (Results 1 – 25 of 77) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h7486 #define SPI_IFCR_CRCEC_Pos (7U) macro
7487 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32wba52xx.h11489 #define SPI_IFCR_CRCEC_Pos (7U) macro
11490 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32wba54xx.h12197 #define SPI_IFCR_CRCEC_Pos (7U) macro
12198 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32wba5mxx.h12215 #define SPI_IFCR_CRCEC_Pos (7U) macro
12216 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32wba55xx.h12215 #define SPI_IFCR_CRCEC_Pos (7U) macro
12216 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h12703 #define SPI_IFCR_CRCEC_Pos (7U) macro
12704 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32h523xx.h18689 #define SPI_IFCR_CRCEC_Pos (7U) macro
18690 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32h562xx.h20233 #define SPI_IFCR_CRCEC_Pos (7U) macro
20234 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32h533xx.h19282 #define SPI_IFCR_CRCEC_Pos (7U) macro
19283 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h17004 #define SPI_IFCR_CRCEC_Pos (7U) macro
17005 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h7b0xx.h17484 #define SPI_IFCR_CRCEC_Pos (7U) macro
17485 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h7b0xxq.h17496 #define SPI_IFCR_CRCEC_Pos (7U) macro
17497 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h7a3xxq.h17016 #define SPI_IFCR_CRCEC_Pos (7U) macro
17017 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h7b3xx.h17491 #define SPI_IFCR_CRCEC_Pos (7U) macro
17492 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h7b3xxq.h17503 #define SPI_IFCR_CRCEC_Pos (7U) macro
17504 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h730xxq.h19070 #define SPI_IFCR_CRCEC_Pos (7U) macro
19071 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h733xx.h19058 #define SPI_IFCR_CRCEC_Pos (7U) macro
19059 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h725xx.h18583 #define SPI_IFCR_CRCEC_Pos (7U) macro
18584 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h730xx.h19058 #define SPI_IFCR_CRCEC_Pos (7U) macro
19059 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
Dstm32h735xx.h19070 #define SPI_IFCR_CRCEC_Pos (7U) macro
19071 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h20820 #define SPI_IFCR_CRCEC_Pos (7U) macro
20821 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32u535xx.h20224 #define SPI_IFCR_CRCEC_Pos (7U) macro
20225 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32u575xx.h23359 #define SPI_IFCR_CRCEC_Pos (7U) macro
23360 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h18727 #define SPI_IFCR_CRCEC_Pos (7U) macro
18728 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…
Dstm32h7s7xx.h20042 #define SPI_IFCR_CRCEC_Pos (7U) macro
20043 #define SPI_IFCR_CRCEC_Msk (0x1UL << SPI_IFCR_CRCEC_Pos) /*!< 0x00000080…

1234