Searched refs:SPI_CR2_TXDMAEN_Pos (Results 1 – 25 of 201) sorted by relevance
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4360 #define SPI_CR2_TXDMAEN_Pos (1U) macro4361 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4422 #define SPI_CR2_TXDMAEN_Pos (1U) macro4423 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4827 #define SPI_CR2_TXDMAEN_Pos (1U) macro4828 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
5479 #define SPI_CR2_TXDMAEN_Pos (1U) macro5480 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
5341 #define SPI_CR2_TXDMAEN_Pos (1U) macro5342 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
5427 #define SPI_CR2_TXDMAEN_Pos (1U) macro5428 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
5353 #define SPI_CR2_TXDMAEN_Pos (1U) macro5354 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
3806 #define SPI_CR2_TXDMAEN_Pos (1U) macro3807 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
3850 #define SPI_CR2_TXDMAEN_Pos (1U) macro3851 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
3886 #define SPI_CR2_TXDMAEN_Pos (1U) macro3887 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
3961 #define SPI_CR2_TXDMAEN_Pos (1U) macro3962 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4176 #define SPI_CR2_TXDMAEN_Pos (1U) macro4177 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
3933 #define SPI_CR2_TXDMAEN_Pos (1U) macro3934 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4044 #define SPI_CR2_TXDMAEN_Pos (1U) macro4045 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4725 #define SPI_CR2_TXDMAEN_Pos (1U) macro4726 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4400 #define SPI_CR2_TXDMAEN_Pos (1U) macro4401 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4448 #define SPI_CR2_TXDMAEN_Pos (1U) macro4449 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4465 #define SPI_CR2_TXDMAEN_Pos (1U) macro4466 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4602 #define SPI_CR2_TXDMAEN_Pos (1U) macro4603 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4588 #define SPI_CR2_TXDMAEN_Pos (1U) macro4589 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4697 #define SPI_CR2_TXDMAEN_Pos (1U) macro4698 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4356 #define SPI_CR2_TXDMAEN_Pos (1U) macro4357 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4408 #define SPI_CR2_TXDMAEN_Pos (1U) macro4409 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4968 #define SPI_CR2_TXDMAEN_Pos (1U) macro4969 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
4831 #define SPI_CR2_TXDMAEN_Pos (1U) macro4832 #define SPI_CR2_TXDMAEN_Msk (0x1UL << SPI_CR2_TXDMAEN_Pos) /*!< 0x00000002 */
