/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 7388 #define SPI_CFG2_AFCNTR_Pos (31U) macro 7389 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32wba52xx.h | 11391 #define SPI_CFG2_AFCNTR_Pos (31U) macro 11392 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32wba54xx.h | 12099 #define SPI_CFG2_AFCNTR_Pos (31U) macro 12100 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32wba5mxx.h | 12117 #define SPI_CFG2_AFCNTR_Pos (31U) macro 12118 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32wba55xx.h | 12117 #define SPI_CFG2_AFCNTR_Pos (31U) macro 12118 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h503xx.h | 12605 #define SPI_CFG2_AFCNTR_Pos (31U) macro 12606 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32h523xx.h | 18591 #define SPI_CFG2_AFCNTR_Pos (31U) macro 18592 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32h562xx.h | 20135 #define SPI_CFG2_AFCNTR_Pos (31U) macro 20136 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32h533xx.h | 19184 #define SPI_CFG2_AFCNTR_Pos (31U) macro 19185 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
/hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
D | stm32h7a3xx.h | 16900 #define SPI_CFG2_AFCNTR_Pos (31U) macro 16901 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h7b0xx.h | 17380 #define SPI_CFG2_AFCNTR_Pos (31U) macro 17381 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h7b0xxq.h | 17392 #define SPI_CFG2_AFCNTR_Pos (31U) macro 17393 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h7a3xxq.h | 16912 #define SPI_CFG2_AFCNTR_Pos (31U) macro 16913 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h7b3xx.h | 17387 #define SPI_CFG2_AFCNTR_Pos (31U) macro 17388 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h7b3xxq.h | 17399 #define SPI_CFG2_AFCNTR_Pos (31U) macro 17400 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h730xxq.h | 18966 #define SPI_CFG2_AFCNTR_Pos (31U) macro 18967 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h733xx.h | 18954 #define SPI_CFG2_AFCNTR_Pos (31U) macro 18955 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h725xx.h | 18479 #define SPI_CFG2_AFCNTR_Pos (31U) macro 18480 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h730xx.h | 18954 #define SPI_CFG2_AFCNTR_Pos (31U) macro 18955 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
D | stm32h735xx.h | 18966 #define SPI_CFG2_AFCNTR_Pos (31U) macro 18967 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000 */
|
/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 20722 #define SPI_CFG2_AFCNTR_Pos (31U) macro 20723 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32u535xx.h | 20126 #define SPI_CFG2_AFCNTR_Pos (31U) macro 20127 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32u575xx.h | 23261 #define SPI_CFG2_AFCNTR_Pos (31U) macro 23262 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 18626 #define SPI_CFG2_AFCNTR_Pos (31U) macro 18627 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|
D | stm32h7s7xx.h | 19941 #define SPI_CFG2_AFCNTR_Pos (31U) macro 19942 #define SPI_CFG2_AFCNTR_Msk (0x1UL << SPI_CFG2_AFCNTR_Pos) /*!< 0x80000000…
|