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Searched refs:SPI_CFG1_UDRDET_0 (Results 1 – 25 of 52) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_spi.h593 #define SPI_UNDERRUN_DETECT_END_DATA_FRAME SPI_CFG1_UDRDET_0
Dstm32h7xx_ll_spi.h282 #define LL_SPI_UDR_DETECT_END_DATA_FRAME (SPI_CFG1_UDRDET_0)
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_spi.h593 #define SPI_UNDERRUN_DETECT_END_DATA_FRAME SPI_CFG1_UDRDET_0
Dstm32mp1xx_ll_spi.h282 #define LL_SPI_UDR_DETECT_END_DATA_FRAME (SPI_CFG1_UDRDET_0)
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_spi.c450 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRDET, SPI_CFG1_UDRDET_0); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_spi.c460 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRDET, SPI_CFG1_UDRDET_0); in HAL_SPI_Init()
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h16810 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h7b0xx.h17290 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h7b0xxq.h17302 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h7a3xxq.h16822 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h7b3xx.h17297 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h7b3xxq.h17309 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h730xxq.h18876 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h733xx.h18864 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h725xx.h18389 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h730xx.h18864 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h735xx.h18876 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h742xx.h17657 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h723xx.h18377 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h750xx.h18586 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h753xx.h18592 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h745xx.h18940 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h745xg.h18940 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h743xx.h18305 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro
Dstm32h755xx.h19227 #define SPI_CFG1_UDRDET_0 (0x1UL << SPI_CFG1_UDRDET_Pos) /*!< 0x00000800 */ macro

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