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Searched refs:SPI_CFG1_MBR_Pos (Results 1 – 25 of 77) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h7319 #define SPI_CFG1_MBR_Pos (28U) macro
7320 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
7322 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
7323 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
7324 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32wba52xx.h11322 #define SPI_CFG1_MBR_Pos (28U) macro
11323 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
11325 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
11326 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
11327 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32wba54xx.h12030 #define SPI_CFG1_MBR_Pos (28U) macro
12031 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
12033 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
12034 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
12035 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32wba5mxx.h12048 #define SPI_CFG1_MBR_Pos (28U) macro
12049 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
12051 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
12052 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
12053 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32wba55xx.h12048 #define SPI_CFG1_MBR_Pos (28U) macro
12049 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
12051 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
12052 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
12053 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h12536 #define SPI_CFG1_MBR_Pos (28U) macro
12537 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
12539 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
12540 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
12541 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32h523xx.h18522 #define SPI_CFG1_MBR_Pos (28U) macro
18523 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
18525 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
18526 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
18527 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32h562xx.h20066 #define SPI_CFG1_MBR_Pos (28U) macro
20067 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
20069 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
20070 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
20071 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32h533xx.h19115 #define SPI_CFG1_MBR_Pos (28U) macro
19116 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
19118 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
19119 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
19120 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h16833 #define SPI_CFG1_MBR_Pos (28U) macro
16834 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
16836 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
16837 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
16838 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h7b0xx.h17313 #define SPI_CFG1_MBR_Pos (28U) macro
17314 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
17316 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
17317 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
17318 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h7b0xxq.h17325 #define SPI_CFG1_MBR_Pos (28U) macro
17326 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
17328 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
17329 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
17330 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h7a3xxq.h16845 #define SPI_CFG1_MBR_Pos (28U) macro
16846 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
16848 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
16849 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
16850 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h7b3xx.h17320 #define SPI_CFG1_MBR_Pos (28U) macro
17321 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
17323 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
17324 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
17325 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h7b3xxq.h17332 #define SPI_CFG1_MBR_Pos (28U) macro
17333 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
17335 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
17336 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
17337 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h730xxq.h18899 #define SPI_CFG1_MBR_Pos (28U) macro
18900 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
18902 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
18903 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
18904 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h733xx.h18887 #define SPI_CFG1_MBR_Pos (28U) macro
18888 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
18890 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
18891 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
18892 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h725xx.h18412 #define SPI_CFG1_MBR_Pos (28U) macro
18413 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
18415 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
18416 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
18417 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h730xx.h18887 #define SPI_CFG1_MBR_Pos (28U) macro
18888 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
18890 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
18891 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
18892 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
Dstm32h735xx.h18899 #define SPI_CFG1_MBR_Pos (28U) macro
18900 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000 */
18902 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000 */
18903 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000 */
18904 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h20653 #define SPI_CFG1_MBR_Pos (28U) macro
20654 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
20656 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
20657 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
20658 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32u535xx.h20057 #define SPI_CFG1_MBR_Pos (28U) macro
20058 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
20060 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
20061 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
20062 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32u575xx.h23192 #define SPI_CFG1_MBR_Pos (28U) macro
23193 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
23195 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
23196 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
23197 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h18557 #define SPI_CFG1_MBR_Pos (28U) macro
18558 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
18560 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
18561 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
18562 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…
Dstm32h7s7xx.h19872 #define SPI_CFG1_MBR_Pos (28U) macro
19873 #define SPI_CFG1_MBR_Msk (0x7UL << SPI_CFG1_MBR_Pos) /*!< 0x70000000…
19875 #define SPI_CFG1_MBR_0 (0x1UL << SPI_CFG1_MBR_Pos) /*!< 0x10000000…
19876 #define SPI_CFG1_MBR_1 (0x2UL << SPI_CFG1_MBR_Pos) /*!< 0x20000000…
19877 #define SPI_CFG1_MBR_2 (0x4UL << SPI_CFG1_MBR_Pos) /*!< 0x40000000…

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