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Searched refs:SECCFGR1 (Results 1 – 25 of 49) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_gtzc.c142 GTZC_TZSC->SECCFGR1 = TZSC_SECCFGR1_ALL_Msk; in HAL_GTZC_TZSC_ConfigPeriphAttributes()
146 GTZC_TZSC->SECCFGR1 = 0x00U; in HAL_GTZC_TZSC_ConfigPeriphAttributes()
169 GTZC_TZSC->SECCFGR1 |= periphpos; in HAL_GTZC_TZSC_ConfigPeriphAttributes()
173 GTZC_TZSC->SECCFGR1 &= ~periphpos; in HAL_GTZC_TZSC_ConfigPeriphAttributes()
222 reg_value = (GTZC_TZSC->SECCFGR1 & TZSC_SECCFGR1_ALL_Msk); in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
276 reg_value = GTZC_TZSC->SECCFGR1; in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_gtzc.c290 SET_BIT(GTZC_TZSC1->SECCFGR1, TZSC1_SECCFGR1_ALL); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
293 SET_BIT(GTZC_TZSC2->SECCFGR1, TZSC2_SECCFGR1_ALL); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
297 CLEAR_BIT(GTZC_TZSC1->SECCFGR1, TZSC1_SECCFGR1_ALL); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
300 CLEAR_BIT(GTZC_TZSC2->SECCFGR1, TZSC2_SECCFGR1_ALL); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
334 register_address = (uint32_t) &(HAL_GTZC_TZSC_GET_INSTANCE(PeriphId)->SECCFGR1) in HAL_GTZC_TZSC_ConfigPeriphAttributes()
402 reg_value = READ_REG(GTZC_TZSC1->SECCFGR1); in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
441 reg_value = READ_REG(GTZC_TZSC2->SECCFGR1); in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
514 register_address = (uint32_t) &(HAL_GTZC_TZSC_GET_INSTANCE(PeriphId)->SECCFGR1) in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
Dstm32u5xx_hal_exti.c723 regaddr = (__IO uint32_t *)(&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_ConfigLineAttributes()
792 regaddr = (__IO uint32_t *)(&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_GetConfigLineAttributes()
Dstm32u5xx_ll_exti.c98 LL_EXTI_WriteReg(SECCFGR1, 0x00000000U); in LL_EXTI_DeInit()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_exti.h1100 SET_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_EnableSecure_0_31()
1134 CLEAR_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_DisableSecure_0_31()
1168 return ((READ_BIT(EXTI->SECCFGR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); in LL_EXTI_IsEnabledSecure_0_31()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_gtzc.c228 SET_BIT(GTZC_TZSC->SECCFGR1, TZSC1_SECCFGR1_ALL); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
234 CLEAR_BIT(GTZC_TZSC->SECCFGR1, TZSC1_SECCFGR1_ALL); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
268 register_address = (uint32_t) &(GTZC_TZSC->SECCFGR1) in HAL_GTZC_TZSC_ConfigPeriphAttributes()
336 reg_value = READ_REG(GTZC_TZSC->SECCFGR1); in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
423 register_address = (uint32_t) &(GTZC_TZSC->SECCFGR1) in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
Dstm32wbaxx_hal_exti.c732 regaddr = (__IO uint32_t *)(&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_ConfigLineAttributes()
801 regaddr = (__IO uint32_t *)(&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_GetConfigLineAttributes()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_gtzc.c237 SET_BIT(GTZC_TZSC->SECCFGR1, TZSC_SECCFGR1_ALL); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
242 CLEAR_BIT(GTZC_TZSC->SECCFGR1, TZSC_SECCFGR1_ALL); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
273 register_address = (uint32_t) &(GTZC_TZSC->SECCFGR1) + (4U * GTZC_GET_REG_INDEX(PeriphId)); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
338 reg_value = READ_REG(GTZC_TZSC->SECCFGR1); in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
399 register_address = (uint32_t) &(GTZC_TZSC->SECCFGR1) + (4U * GTZC_GET_REG_INDEX(PeriphId)); in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
Dstm32l5xx_hal_exti.c721 regaddr = (&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_ConfigLineAttributes()
790 regaddr = (&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_GetConfigLineAttributes()
Dstm32l5xx_ll_exti.c99 LL_EXTI_WriteReg(SECCFGR1, 0x00000000U); in LL_EXTI_DeInit()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_exti.h1240 SET_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_EnableSecure_0_31()
1279 CLEAR_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_DisableSecure_0_31()
1320 return ((READ_BIT(EXTI->SECCFGR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); in LL_EXTI_IsEnabledSecure_0_31()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_gtzc.c272 SET_BIT(GTZC_TZSC1->SECCFGR1, GTZC_CFGR1_MSK); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
278 CLEAR_BIT(GTZC_TZSC1->SECCFGR1, GTZC_CFGR1_MSK); in HAL_GTZC_TZSC_ConfigPeriphAttributes()
312 register_address = (uint32_t) &(GTZC_TZSC1->SECCFGR1) in HAL_GTZC_TZSC_ConfigPeriphAttributes()
422 reg_value = READ_REG(GTZC_TZSC1->SECCFGR1); in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
483 register_address = (uint32_t) &(GTZC_TZSC1->SECCFGR1) in HAL_GTZC_TZSC_GetConfigPeriphAttributes()
Dstm32h5xx_hal_exti.c724 regaddr = (__IO uint32_t *)(&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_ConfigLineAttributes()
793 regaddr = (__IO uint32_t *)(&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_GetConfigLineAttributes()
Dstm32h5xx_ll_exti.c119 LL_EXTI_WriteReg(SECCFGR1, 0x00000000U); in LL_EXTI_DeInit()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_exti.h1569 SET_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_EnableSecure_0_31()
1636 CLEAR_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_DisableSecure_0_31()
1705 return ((READ_BIT(EXTI->SECCFGR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); in LL_EXTI_IsEnabledSecure_0_31()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_exti.h1740 SET_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_EnableSecure_0_31()
1824 CLEAR_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_DisableSecure_0_31()
1911 return ((READ_BIT(EXTI->SECCFGR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); in LL_EXTI_IsEnabledSecure_0_31()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_exti.h2175 SET_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_EnableSecure_0_31()
2287 CLEAR_BIT(EXTI->SECCFGR1, ExtiLine); in LL_EXTI_DisableSecure_0_31()
2400 return ((READ_BIT(EXTI->SECCFGR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL); in LL_EXTI_IsEnabledSecure_0_31()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_exti.c731 regaddr = (__IO uint32_t *)(&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_ConfigLineAttributes()
796 regaddr = (__IO uint32_t *)(&EXTI->SECCFGR1 + (EXTI_SECCFGR_OFFSET * offset)); in HAL_EXTI_GetConfigLineAttributes()
Dstm32n6xx_ll_exti.c101 LL_EXTI_WriteReg(SECCFGR1, 0x00000000U); in LL_EXTI_DeInit()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h319 …__IO uint32_t SECCFGR1; /*!< EXTI Security Configuration Register 1, Address offset… member
403 …__IO uint32_t SECCFGR1; /*!< TZSC secure configuration register 1, … member
Dstm32wba54xx.h336 …__IO uint32_t SECCFGR1; /*!< EXTI Security Configuration Register 1, Address offset… member
420 …__IO uint32_t SECCFGR1; /*!< TZSC secure configuration register 1, … member
Dstm32wba5mxx.h336 …__IO uint32_t SECCFGR1; /*!< EXTI Security Configuration Register 1, Address offset… member
420 …__IO uint32_t SECCFGR1; /*!< TZSC secure configuration register 1, … member
Dstm32wba55xx.h336 …__IO uint32_t SECCFGR1; /*!< EXTI Security Configuration Register 1, Address offset… member
420 …__IO uint32_t SECCFGR1; /*!< TZSC secure configuration register 1, … member
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h515 …__IO uint32_t SECCFGR1; /*!< EXTI Security Configuration Register 1, Address offset… member
642 …__IO uint32_t SECCFGR1; /*!< TZSC secure configuration register 1, Addres… member
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h492 …__IO uint32_t SECCFGR1; /*!< EXTI Security Configuration Register 1, Address offset… member
611 …__IO uint32_t SECCFGR1; /*!< TZSC secure configuration register 1, … member

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