Searched refs:SDMMC_STA_DCRCFAIL_Pos (Results 1 – 25 of 108) sorted by relevance
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11442 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro11443 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
11420 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro11421 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
11665 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro11666 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
11643 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro11644 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
13157 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro13158 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
12516 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro12517 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
12864 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro12865 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
13084 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro13085 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
13771 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro13772 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
13478 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro13479 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
11658 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro11659 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
11713 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro11714 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
11429 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro11430 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
11883 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro11884 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
12701 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro12702 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
11791 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro11792 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
12016 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro12017 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
12865 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro12866 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
13022 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro13023 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
13241 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro13242 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
13090 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro13091 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
14436 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro14437 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
14096 #define SDMMC_STA_DCRCFAIL_Pos (1U) macro14097 #define SDMMC_STA_DCRCFAIL_Msk (0x1UL << SDMMC_STA_DCRCFAIL_Pos) /*!< 0x00000002 */
