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Searched refs:SDMMC_CLKCR_PWRSAV_Pos (Results 1 – 25 of 108) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h11309 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11310 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f722xx.h11287 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11288 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f730xx.h11532 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11533 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f733xx.h11532 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11533 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f732xx.h11510 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11511 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f750xx.h13024 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
13025 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f745xx.h12383 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
12384 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f756xx.h13024 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
13025 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f746xx.h12731 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
12732 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f765xx.h12951 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
12952 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f777xx.h13638 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
13639 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32f767xx.h13345 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
13346 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l433xx.h11530 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11531 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l451xx.h11585 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11586 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l431xx.h11301 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11302 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l443xx.h11755 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11756 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l471xx.h12573 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
12574 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l452xx.h11663 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11664 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l462xx.h11888 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
11889 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l475xx.h12737 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
12738 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l476xx.h12894 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
12895 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l486xx.h13113 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
13114 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l485xx.h12962 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
12963 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l4a6xx.h14308 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
14309 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */
Dstm32l496xx.h13968 #define SDMMC_CLKCR_PWRSAV_Pos (9U) macro
13969 #define SDMMC_CLKCR_PWRSAV_Msk (0x1UL << SDMMC_CLKCR_PWRSAV_Pos) /*!< 0x00000200 */

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