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Searched refs:SCR (Results 1 – 25 of 322) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_pwr.c473 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
531 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
546 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
573 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
596 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSHUTDOWNMode()
617 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
629 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
641 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
653 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_pwr.c259 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
309 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
326 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
349 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
367 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
380 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
393 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
405 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_pwr.c274 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSLEEPMode()
331 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in HAL_PWR_EnterSTOPMode()
348 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
371 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in HAL_PWR_EnterSTANDBYMode()
392 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
405 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
419 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
432 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_pwr.c290 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSLEEPMode()
347 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in HAL_PWR_EnterSTOPMode()
364 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
382 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in HAL_PWR_EnterSTANDBYMode()
403 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
416 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
430 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
443 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_pwr.c347 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
416 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
433 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
459 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
483 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
497 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
511 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
524 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_pwr.c509 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSLEEPMode()
568 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
593 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
615 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTANDBYMode()
637 SET_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_EnableSleepOnExit()
650 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_DisableSleepOnExit()
663 SET_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_EnableSEVOnPend()
675 CLEAR_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_pwr.c368 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
414 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
430 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
449 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
499 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
511 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
523 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
535 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_pwr.c401 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
455 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
475 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
494 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
544 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
556 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
568 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
580 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_pwr.c396 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
456 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in HAL_PWR_EnterSTOPMode()
476 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
495 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in HAL_PWR_EnterSTANDBYMode()
545 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
557 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
569 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
581 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_pwr.c455 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
501 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
517 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
537 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
559 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
572 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
585 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
598 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_rtc_ex.c288 WRITE_REG(RTC->SCR, RTC_SCR_CTSF); in HAL_RTCEx_DeactivateTimeStamp()
352 WRITE_REG(RTC->SCR, RTC_SCR_CITSF); in HAL_RTCEx_DeactivateInternalTimeStamp()
357 WRITE_REG(RTC->SCR, RTC_SCR_CTSF); in HAL_RTCEx_DeactivateInternalTimeStamp()
431 WRITE_REG(RTC->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); in HAL_RTCEx_GetTimeStamp()
452 WRITE_REG(RTC->SCR, RTC_SCR_CITSF | RTC_SCR_CTSF); in HAL_RTCEx_TimeStampIRQHandler()
489 WRITE_REG(RTC->SCR, RTC_SCR_CTSOVF); in HAL_RTCEx_PollForTimeStampEvent()
633 WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_SetWakeUpTimer_IT()
730 WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_DeactivateWakeUpTimer()
765 WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_WakeUpTimerIRQHandler()
819 WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_PollForWakeUpTimerEvent()
[all …]
Dstm32wlxx_hal_pwr.c115 LL_PWR_WriteReg(SCR, in HAL_PWR_DeInit()
122 LL_PWR_WriteReg(SCR, in HAL_PWR_DeInit()
509 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
608 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
638 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
650 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
662 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
674 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_pwr.c426 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
475 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
491 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
508 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
530 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
543 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
556 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
569 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_pwr.c574 CLEAR_BIT (SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSLEEPMode()
651 SET_BIT (SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
670 CLEAR_BIT (SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
717 SET_BIT (SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTANDBYMode()
744 SET_BIT (SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_EnableSleepOnExit()
757 CLEAR_BIT (SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_DisableSleepOnExit()
770 SET_BIT (SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_EnableSEVOnPend()
782 CLEAR_BIT (SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_pwr.c128 LL_PWR_WriteReg(SCR, in HAL_PWR_DeInit()
528 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
622 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
636 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
650 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
662 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
675 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
688 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_pwr.c495 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSLEEPMode()
576 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
593 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
620 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTANDBYMode()
641 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
654 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
667 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
680 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_pwr.c546 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
610 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
632 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
659 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
677 SET_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_EnableSleepOnExit()
690 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_DisableSleepOnExit()
703 SET_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_EnableSEVOnPend()
715 CLEAR_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_pwr.c299 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSLEEPMode()
356 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
373 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTOPMode()
393 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode()
417 SET_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_EnableSleepOnExit()
430 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_DisableSleepOnExit()
443 SET_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_EnableSEVOnPend()
455 CLEAR_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_pwr.c549 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSLEEPMode()
606 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
632 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
654 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTANDBYMode()
676 SET_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_EnableSleepOnExit()
689 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_DisableSleepOnExit()
702 SET_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_EnableSEVOnPend()
714 CLEAR_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_pwr.c526 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSLEEPMode()
585 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
639 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
674 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in HAL_PWR_EnterSTANDBYMode()
723 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit()
738 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_DisableSleepOnExit()
752 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
766 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_DisableSEVOnPend()
Dstm32mp1xx_hal_rtc_ex.c401 WRITE_REG(RTC->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); in HAL_RTCEx_GetTimeStamp()
423 WRITE_REG(RTC->SCR, RTC_SCR_CITSF | RTC_SCR_CTSF); in HAL_RTCEx_TimeStampIRQHandler()
448 WRITE_REG(RTC->SCR, RTC_SCR_CITSF | RTC_SCR_CTSF); in HAL_RTCEx_TimeStampIRQHandler()
486 WRITE_REG(RTC->SCR, RTC_SCR_CTSOVF); in HAL_RTCEx_PollForTimeStampEvent()
630 WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_SetWakeUpTimer_IT()
760 WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_WakeUpTimerIRQHandler()
786 WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_WakeUpTimerIRQHandler()
840 WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_PollForWakeUpTimerEvent()
1365 WRITE_REG(RTC->SCR, RTC_SCR_CALRBF); in HAL_RTCEx_PollForAlarmBEvent()
1577 WRITE_REG(TAMP->SCR, Tamper); in HAL_RTCEx_DeactivateTamper()
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_pwr.c567 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSLEEPMode()
635 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
652 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTOPMode()
677 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); in HAL_PWR_EnterSTANDBYMode()
695 SET_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_EnableSleepOnExit()
708 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk); in HAL_PWR_DisableSleepOnExit()
721 SET_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_EnableSEVOnPend()
733 CLEAR_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk); in HAL_PWR_DisableSEVOnPend()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_pwr.h2003 WRITE_REG(PWR->SCR, PWR_SCR_CWUF); in LL_PWR_ClearFlag_WU()
2014 WRITE_REG(PWR->SCR, PWR_SCR_CWUF5); in LL_PWR_ClearFlag_WU5()
2025 WRITE_REG(PWR->SCR, PWR_SCR_CWUF4); in LL_PWR_ClearFlag_WU4()
2036 WRITE_REG(PWR->SCR, PWR_SCR_CWUF3); in LL_PWR_ClearFlag_WU3()
2048 WRITE_REG(PWR->SCR, PWR_SCR_CWUF2); in LL_PWR_ClearFlag_WU2()
2059 WRITE_REG(PWR->SCR, PWR_SCR_CWUF1); in LL_PWR_ClearFlag_WU1()
2145 WRITE_REG(PWR->SCR, PWR_SCR_CBORHF); in LL_PWR_ClearFlag_BORH()
2182 WRITE_REG(PWR->SCR, PWR_SCR_CSMPSFBF); in LL_PWR_ClearFlag_SMPSFB()
2265 WRITE_REG(PWR->SCR, PWR_SCR_CBLEWUF); in LL_PWR_ClearFlag_BLEWU()
2276 WRITE_REG(PWR->SCR, PWR_SCR_C802WUF); in LL_PWR_ClearFlag_802WU()
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_rtc_ex.c239 WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CITSF); in HAL_RTCEx_SetTimeStamp_IT()
275 WRITE_REG(hrtc->Instance->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); in HAL_RTCEx_DeactivateTimeStamp()
404 WRITE_REG(hrtc->Instance->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); in HAL_RTCEx_GetTimeStamp()
451 WRITE_REG(hrtc->Instance->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); in HAL_RTCEx_TimeStampIRQHandler()
456 WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CTSF); in HAL_RTCEx_TimeStampIRQHandler()
479 WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CTSOVF); in HAL_RTCEx_PollForTimeStampEvent()
747 WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_WakeUpTimerIRQHandler()
806 WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CWUTF); in HAL_RTCEx_PollForWakeUpTimerEvent()
1300 WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRBF); in HAL_RTCEx_PollForAlarmBEvent()
1495 WRITE_REG(TAMP->SCR, Tamper); in HAL_RTCEx_DeactivateTamper()
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_pwr.h961 WRITE_REG(PWR->SCR, PWR_SCR_CSBF); in LL_PWR_ClearFlag_SB()
971 WRITE_REG(PWR->SCR, PWR_SCR_CWUF); in LL_PWR_ClearFlag_WU()
981 WRITE_REG(PWR->SCR, PWR_SCR_CWUF6); in LL_PWR_ClearFlag_WU6()
992 WRITE_REG(PWR->SCR, PWR_SCR_CWUF5); in LL_PWR_ClearFlag_WU5()
1003 WRITE_REG(PWR->SCR, PWR_SCR_CWUF4); in LL_PWR_ClearFlag_WU4()
1013 WRITE_REG(PWR->SCR, PWR_SCR_CWUF3); in LL_PWR_ClearFlag_WU3()
1023 WRITE_REG(PWR->SCR, PWR_SCR_CWUF2); in LL_PWR_ClearFlag_WU2()
1033 WRITE_REG(PWR->SCR, PWR_SCR_CWUF1); in LL_PWR_ClearFlag_WU1()

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