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Searched refs:RTC_TAFCR_TSINSEL_Pos (Results 1 – 25 of 27) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h5414 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
5415 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f410rx.h5418 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
5419 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f410tx.h5374 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
5375 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f401xc.h5091 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
5092 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f401xe.h5091 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
5092 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f411xe.h5122 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
5123 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f405xx.h10576 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10577 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f412cx.h9731 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
9732 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f415xx.h10861 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10862 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f423xx.h11259 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
11260 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f407xx.h10912 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10913 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f412zx.h10729 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10730 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f412rx.h10696 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10697 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f412vx.h10707 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10708 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f413xx.h11109 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
11110 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f427xx.h11796 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
11797 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f446xx.h11668 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
11669 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f417xx.h11194 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
11195 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f429xx.h12152 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
12153 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f439xx.h12446 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
12447 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f437xx.h12098 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
12099 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h10363 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10364 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f205xx.h10108 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10109 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f207xx.h10443 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10444 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */
Dstm32f217xx.h10698 #define RTC_TAFCR_TSINSEL_Pos (17U) macro
10699 #define RTC_TAFCR_TSINSEL_Msk (0x1UL << RTC_TAFCR_TSINSEL_Pos) /*!< 0x00020000 */

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