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Searched refs:RISAF_REGx_CFGR_PRIVC0_Pos (Results 1 – 5 of 5) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rif.c589 | (pConfig->PrivWhitelist << RISAF_REGx_CFGR_PRIVC0_Pos)); in HAL_RIF_RISAF_ConfigBaseRegion()
634 …>PrivWhitelist = ((cfgr_reg & (RIF_CID_MASK << RISAF_REGx_CFGR_PRIVC0_Pos)) >> RISAF_REGx_CFGR_PRI… in HAL_RIF_RISAF_GetConfigBaseRegion()
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h32099 #define RISAF_REGx_CFGR_PRIVC0_Pos (16U) macro
32100 #define RISAF_REGx_CFGR_PRIVC0_Msk (0x1UL << RISAF_REGx_CFGR_PRIVC0_Pos) /*!< …
Dstm32n657xx.h33464 #define RISAF_REGx_CFGR_PRIVC0_Pos (16U) macro
33465 #define RISAF_REGx_CFGR_PRIVC0_Msk (0x1UL << RISAF_REGx_CFGR_PRIVC0_Pos) /*!< …
Dstm32n655xx.h33132 #define RISAF_REGx_CFGR_PRIVC0_Pos (16U) macro
33133 #define RISAF_REGx_CFGR_PRIVC0_Msk (0x1UL << RISAF_REGx_CFGR_PRIVC0_Pos) /*!< …
Dstm32n647xx.h32431 #define RISAF_REGx_CFGR_PRIVC0_Pos (16U) macro
32432 #define RISAF_REGx_CFGR_PRIVC0_Msk (0x1UL << RISAF_REGx_CFGR_PRIVC0_Pos) /*!< …