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Searched refs:RCC_SYSCLK_DIV2 (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_rcc.c824 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); in HAL_RCC_ClockConfig()
825 hpre = RCC_SYSCLK_DIV2; in HAL_RCC_ClockConfig()
855 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); in HAL_RCC_ClockConfig()
856 hpre = RCC_SYSCLK_DIV2; in HAL_RCC_ClockConfig()
896 if(hpre == RCC_SYSCLK_DIV2) in HAL_RCC_ClockConfig()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_rcc.c1209 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); in HAL_RCC_ClockConfig()
1210 hpre = RCC_SYSCLK_DIV2; in HAL_RCC_ClockConfig()
1254 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); in HAL_RCC_ClockConfig()
1255 hpre = RCC_SYSCLK_DIV2; in HAL_RCC_ClockConfig()
1279 if(hpre == RCC_SYSCLK_DIV2) in HAL_RCC_ClockConfig()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_rcc.c1168 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); in HAL_RCC_ClockConfig()
1169 hpre = RCC_SYSCLK_DIV2; in HAL_RCC_ClockConfig()
1211 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); in HAL_RCC_ClockConfig()
1212 hpre = RCC_SYSCLK_DIV2; in HAL_RCC_ClockConfig()
1236 if(hpre == RCC_SYSCLK_DIV2) in HAL_RCC_ClockConfig()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc.h223 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 macro
1238 #define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_DIV1) || ((HCLK) == RCC_SYSCLK_DIV2) || \
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_rcc.h204 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
1342 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) |…
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc.h167 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) |…
469 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_rcc.h160 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) |…
416 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc.h226 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 macro
1415 #define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_DIV1) || ((HCLK) == RCC_SYSCLK_DIV2) || \
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc.h208 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) |…
449 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_rcc.h175 #define IS_RCC_HCLKx(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2…
591 #define RCC_SYSCLK_DIV2 LL_RCC_SYSCLK_DIV_2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc.h195 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) |…
459 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h128 #define IS_RCC_SYSCLK(SYSCLK) (((SYSCLK) == RCC_SYSCLK_DIV1) || ((SYSCLK) == RCC_SYSCLK_DIV2) || \
435 #define RCC_SYSCLK_DIV2 RCC_CR_SYSDIV_0 /*!< SYSCLK is divide… macro
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h316 #define RCC_SYSCLK_DIV2 RCC_CFGR2_HPRE_2 … macro
2382 …K__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) || \
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h241 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 macro
2039 #define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_DIV1) || ((HCLK) == RCC_SYSCLK_DIV2) || \
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_rcc.h173 #define IS_RCC_HCLKx(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2…
630 #define RCC_SYSCLK_DIV2 LL_RCC_SYSCLK_DIV_2 /*!< SYSCLK divided by 2 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_hal_rcc.h434 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_3 … macro
2891 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2)…
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h132 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2)…
603 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_3 … macro
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h349 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
3303 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2)…
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h447 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_3 /*!< SYSCLK divi… macro
3468 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2)…
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c138 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2)…
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h456 #define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ macro
4768 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2)…
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h340 #define RCC_SYSCLK_DIV2 RCC_CFGR2_HPRE_3 … macro
4996 #define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2)…
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_rcc.h361 #define RCC_SYSCLK_DIV2 RCC_CDCFGR_CPRE_3 /*!< SYSCL… macro
4692 …SYSCLK(__SYSCLK__) (((__SYSCLK__) == RCC_SYSCLK_DIV1) || ((__SYSCLK__) == RCC_SYSCLK_DIV2) || \
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h351 #define RCC_SYSCLK_DIV2 RCC_D1CFGR_D1CPRE_DIV2 macro
361 #define RCC_SYSCLK_DIV2 RCC_CDCFGR1_CDCPRE_DIV2 macro
8106 #define IS_RCC_SYSCLK(SYSCLK) (((SYSCLK) == RCC_SYSCLK_DIV1) || ((SYSCLK) == RCC_SYSCLK_DIV2) |…
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h462 #define RCC_SYSCLK_DIV2 RCC_CFGR2_HPRE_3 … macro