Searched refs:RCC_RNGCLKSOURCE_PLL1Q (Results 1 – 4 of 4) sorted by relevance
298 #define RCC_RNGCLKSOURCE_PLL1Q (RCC_CCIPR2_RNGSEL_0 | RCC_CCIPR2_RNGSEL_1) macro947 ((__SOURCE__) == RCC_RNGCLKSOURCE_PLL1Q))
923 #define RCC_RNGCLKSOURCE_PLL1Q RCC_CCIPR5_RNGSEL_0 macro3617 ((__SOURCE__) == RCC_RNGCLKSOURCE_PLL1Q) || \
225 if (PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLL1Q) in HAL_RCCEx_PeriphCLKConfig()
1805 case RCC_RNGCLKSOURCE_PLL1Q: /* PLL1 is used as clock source for RNG*/ in HAL_RCCEx_PeriphCLKConfig()5194 else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) && (srcclk == RCC_RNGCLKSOURCE_PLL1Q)) in HAL_RCCEx_GetPeriphCLKFreq()
