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Searched refs:RCC_PLLI2SCFGR_PLLI2SR_Pos (Results 1 – 25 of 45) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_rcc_ex.c358 plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_PeriphCLKConfig()
378 plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_PeriphCLKConfig()
517 …I2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_GetPeriphCLKConfig()
962 tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_PeriphCLKConfig()
1179 …I2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_GetPeriphCLKConfig()
1686 …I2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_GetPeriphCLKConfig()
2252 tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_PeriphCLKConfig()
2441 …I2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_GetPeriphCLKConfig()
2689 …I2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_GetPeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_rcc_ex.c502 tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_PeriphCLKConfig()
521 tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_PeriphCLKConfig()
701 …I2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_GetPeriphCLKConfig()
1151 tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_PeriphCLKConfig()
1293 …I2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); in HAL_RCCEx_GetPeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_rcc.h699 ((__PLLI2SR__) >> RCC_PLLI2SCFGR_PLLI2SR_Pos))
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_rcc.h2591 …(((__PLLI2SQ_R__) >> RCC_PLLI2SCFGR_PLLI2SR_Pos) * ((__PLLI2SDIVQ_R__) >> RCC_DCKCFGR_PLLI2SDIVR_P…
2759 ((__PLLI2SR__) >> RCC_PLLI2SCFGR_PLLI2SR_Pos))
Dstm32f4xx_hal_rcc_ex.h5927 ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos)))
5957 ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos)))
5976 ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos)))
6002 … ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos)))
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f401xc.h4578 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
4579 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
4581 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
4582 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
4583 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f401xe.h4578 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
4579 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
4581 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
4582 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
4583 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f411xe.h4609 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
4610 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
4612 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
4613 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
4614 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f405xx.h10034 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10035 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10037 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10038 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10039 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f412cx.h9132 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
9133 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
9135 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
9136 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
9137 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f415xx.h10319 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10320 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10322 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10323 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10324 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f423xx.h10511 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10512 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10514 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10515 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10516 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f407xx.h10370 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10371 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10373 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10374 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10375 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f412zx.h10130 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10131 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10133 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10134 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10135 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f412rx.h10097 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10098 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10100 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10101 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10102 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f412vx.h10108 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10109 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10111 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10112 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10113 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f413xx.h10466 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10467 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10469 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10470 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10471 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h2676 ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos))
2720 ((__PLLI2SR__) << RCC_PLLI2SCFGR_PLLI2SR_Pos))
Dstm32f7xx_ll_rcc.h1875 ((__PLLI2SR__) >> RCC_PLLI2SCFGR_PLLI2SR_Pos))
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h9883 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
9884 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
9886 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
9887 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
9888 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f205xx.h9628 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
9629 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
9631 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
9632 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
9633 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f207xx.h9963 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
9964 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
9966 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
9967 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
9968 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f217xx.h10218 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10219 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10221 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10222 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10223 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h10092 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10093 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10095 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10096 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10097 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */
Dstm32f722xx.h10070 #define RCC_PLLI2SCFGR_PLLI2SR_Pos (28U) macro
10071 #define RCC_PLLI2SCFGR_PLLI2SR_Msk (0x7UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x70000000 */
10073 #define RCC_PLLI2SCFGR_PLLI2SR_0 (0x1UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x10000000 */
10074 #define RCC_PLLI2SCFGR_PLLI2SR_1 (0x2UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x20000000 */
10075 #define RCC_PLLI2SCFGR_PLLI2SR_2 (0x4UL << RCC_PLLI2SCFGR_PLLI2SR_Pos) /*!< 0x40000000 */

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