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Searched refs:RCC_PLLCKSELR_DIVM1 (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_rcc.c1294 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) ; in HAL_RCC_GetSysClockFreq()
1715 RCC_OscInitStruct->PLL1.PLLM = ((regvalue & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos); in HAL_RCC_GetOscConfig()
2025 …MODIFY_REG(RCC->PLLCKSELR, (RCC_PLLCKSELR_PLLSRC | (RCC_PLLCKSELR_DIVM1 << ((RCC_PLLCKSELR_DIVM2_P… in RCC_PLL_Config()
2082 …MODIFY_REG(RCC->PLLCKSELR, ((RCC_PLLCKSELR_DIVM1 << (RCC_PLLCKSELR_DIVM1_Pos + ((RCC_PLLCKSELR_DIV… in RCC_PLL_Config()
2108 pllm = (tmpreg1 & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos; in RCC_PLL1_GetVCOOutputFreq()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc.c862 …((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->… in HAL_RCC_OscConfig()
1425 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4) ; in HAL_RCC_GetSysClockFreq()
1700 …RCC_OscInitStruct->PLL.PLLM = (uint32_t)((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_D… in HAL_RCC_GetOscConfig()
Dstm32h7xx_hal_rcc_ex.c3088 pll1m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4); in HAL_RCCEx_GetPLL1ClockFreq()
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dsystem_stm32h7rsxx.c220 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) ; in SystemCoreClockUpdate()
Dsystem_stm32h7xx.c369 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dstm32h7r3xx.h14737 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk /*!< DIVM1[5:0] bits… macro
Dstm32h7s7xx.h15771 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk /*!< DIVM1[5:0] bits… macro
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dsystem_stm32h7xx_dualcore_bootcm4_cm7gated.c348 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dsystem_stm32h7xx_dualcore_bootcm7_cm4gated.c354 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dsystem_stm32h7xx_dualcore_boot_cm4_cm7.c356 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dsystem_stm32h7xx_singlecore.c349 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dsystem_stm32h7xx.c374 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dstm32h7a3xx.h13021 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk macro
Dstm32h7b0xx.h13465 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk macro
Dstm32h7b0xxq.h13477 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk macro
Dstm32h7a3xxq.h13033 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk macro
Dstm32h7b3xx.h13472 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk macro
Dstm32h7b3xxq.h13484 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk macro
Dstm32h730xxq.h15333 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk macro
Dstm32h733xx.h15321 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk macro
Dstm32h725xx.h14882 #define RCC_PLLCKSELR_DIVM1 RCC_PLLCKSELR_DIVM1_Msk macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_rcc.h3764 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1 | RCC_PLLCKSELR_PLLSRC, in LL_RCC_PLL1_ConfigDomain_SYS()
4001 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos); in LL_RCC_PLL1_GetM()
4073 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1, M << RCC_PLLCKSELR_DIVM1_Pos); in LL_RCC_PLL1_SetM()
Dstm32h7rsxx_hal_rcc.h3944 …MODIFY_REG(RCC->PLLCKSELR, (RCC_PLLCKSELR_PLLSRC | RCC_PLLCKSELR_DIVM1) , ((__PLLSOURCE__) | ( (__…
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_rcc.h4521 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos); in LL_RCC_PLL1_GetM()
4583 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1, M << RCC_PLLCKSELR_DIVM1_Pos); in LL_RCC_PLL1_SetM()
Dstm32h7xx_hal_rcc.h7592 …do{ MODIFY_REG(RCC->PLLCKSELR, (RCC_PLLCKSELR_PLLSRC | RCC_PLLCKSELR_DIVM1) , ((__RCC_PLLSOURCE__)…

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