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Searched refs:RCC_PLLCFGR_PLLQEN (Results 1 – 25 of 85) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_rcc.h3247 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_RNG()
3262 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_RNG()
3272 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_RNG()
3286 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_FDCAN()
3301 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_FDCAN()
3311 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_FDCAN()
3325 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_USB()
3340 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_USB()
3350 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_USB()
3364 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_TIM1()
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Dstm32g0xx_hal_rcc.h557 #define RCC_PLLQCLK RCC_PLLCFGR_PLLQEN /*!< PLLQCLK selection from main PLL */
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_rcc.h2740 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_RNG()
2752 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_RNG()
2762 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_RNG()
2772 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_I2S()
2784 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_I2S()
2794 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_I2S()
Dstm32wlxx_hal_rcc.h524 #define RCC_PLL_I2S2CLK RCC_PLLCFGR_PLLQEN /*!< PLLI2S2CLK selected from main PLL */
525 #define RCC_PLL_RNGCLK RCC_PLLCFGR_PLLQEN /*!< PLLRNGCLK selected from main PLL */
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_rcc.h2424 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_48M()
2438 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_48M()
2448 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_48M()
Dstm32g4xx_hal_rcc.h308 #define RCC_PLL_48M1CLK RCC_PLLCFGR_PLLQEN /*!< PLL48M1CLK selection from main …
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_rcc.h2671 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_PLLQ()
2685 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_PLLQ()
2695 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_PLLQ()
Dstm32u0xx_hal_rcc.h275 #define RCC_PLL_DIVQ RCC_PLLCFGR_PLLQEN
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_rcc.h3355 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_48M()
3367 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_48M()
3377 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_48M()
Dstm32wbxx_hal_rcc.h550 #define RCC_PLL_USBCLK RCC_PLLCFGR_PLLQEN /*!< PLLUSBCLK selection from main P…
551 #define RCC_PLL_RNGCLK RCC_PLLCFGR_PLLQEN /*!< PLLRNGCLK selection from main P…
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_rcc.h3346 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_48M()
3360 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_48M()
3370 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_48M()
Dstm32l5xx_hal_rcc.h345 #define RCC_PLL_48M1CLK RCC_PLLCFGR_PLLQEN /*!< PLL48M1CLK selection from main …
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_rcc_ex.c936 if (HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) in HAL_RCCEx_GetPeriphCLKFreq()
1018 if (HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) in HAL_RCCEx_GetPeriphCLKFreq()
1549 if (HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) in HAL_RCCEx_GetPeriphCLKFreq()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_rcc.h4165 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_EnableDomain_48M()
4179 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); in LL_RCC_PLL_DisableDomain_48M()
4189 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); in LL_RCC_PLL_IsEnabledDomain_48M()
Dstm32l4xx_hal_rcc.h362 #define RCC_PLL_48M1CLK RCC_PLLCFGR_PLLQEN /*!< PLL48M1CLK selection from main …
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_rcc_ex.c1298 if(HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) in HAL_RCCEx_GetPeriphCLKFreq()
1390 if(HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) in HAL_RCCEx_GetPeriphCLKFreq()
2003 if(HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) in HAL_RCCEx_GetPeriphCLKFreq()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_rcc.c733 …RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR_PLLQEN | RCC_PLLCFGR_PLLRE… in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_rcc.c863 …CLEAR_BIT(RCC->PLLCFGR, (RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR_PLLQEN | RCC_PLLCFG… in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_rcc.c1004 …CLEAR_BIT(RCC->PLLCFGR, (RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR_PLLQEN | RCC_PLLCFG… in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_rcc_ex.c1231 …CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN | RCC_PLLCFGR_PLLQEN | RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR… in HAL_RCCEx_DisablePLL()
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g031xx.h4316 #define RCC_PLLCFGR_PLLQEN RCC_PLLCFGR_PLLQEN_Msk macro
Dstm32g041xx.h4552 #define RCC_PLLCFGR_PLLQEN RCC_PLLCFGR_PLLQEN_Msk macro
Dstm32g051xx.h4652 #define RCC_PLLCFGR_PLLQEN RCC_PLLCFGR_PLLQEN_Msk macro
Dstm32g061xx.h4888 #define RCC_PLLCFGR_PLLQEN RCC_PLLCFGR_PLLQEN_Msk macro
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h6028 #define RCC_PLLCFGR_PLLQEN RCC_PLLCFGR_PLLQEN_Msk macro

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