Searched refs:RCC_PLLCFGR_PLL1PEN (Results 1 – 7 of 7) sorted by relevance
3778 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1PEN); in LL_RCC_PLL1P_Enable()3831 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1PEN) == RCC_PLLCFGR_PLL1PEN) ? 1UL : 0UL); in LL_RCC_PLL1P_IsEnabled()3882 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1PEN); in LL_RCC_PLL1P_Disable()
293 #define RCC_PLL_PCLK RCC_PLLCFGR_PLL1PEN /*!< PLL DIVP divider output enable */
1951 …CLEAR_BIT(RCC->PLLCFGR, (RCC_PLLCFGR_PLL1PEN | RCC_PLLCFGR_PLL1QEN | RCC_PLLCFGR_PLL1REN | RCC_PLL… in RCC_PLL_Config()2048 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1PEN); in RCC_PLL_Config()
14783 #define RCC_PLLCFGR_PLL1PEN RCC_PLLCFGR_PLL1PEN_Msk /*!< PLL1 DIVP divid… macro
15817 #define RCC_PLLCFGR_PLL1PEN RCC_PLLCFGR_PLL1PEN_Msk /*!< PLL1 DIVP divid… macro
15415 #define RCC_PLLCFGR_PLL1PEN RCC_PLLCFGR_PLL1PEN_Msk /*!< PLL1 DIVP divid… macro
15183 #define RCC_PLLCFGR_PLL1PEN RCC_PLLCFGR_PLL1PEN_Msk /*!< PLL1 DIVP divid… macro
