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Searched refs:RCC_PLLCFGR_PLL1FRACEN (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_rcc.c1295 pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos); in HAL_RCC_GetSysClockFreq()
1719 if ((regvalue & RCC_PLLCFGR_PLL1FRACEN) != 0x00u) in HAL_RCC_GetOscConfig()
2035 …MODIFY_REG(RCC->PLLCFGR, (RCC_PLLCFGR_PLL1RGE | RCC_PLLCFGR_PLL1VCOSEL | RCC_PLLCFGR_PLL1FRACEN) <… in RCC_PLL_Config()
2061 …SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN << ((RCC_PLLCFGR_PLL2FRACEN_Pos - RCC_PLLCFGR_PLL1FRA… in RCC_PLL_Config()
2118 if ((tmpreg1 & RCC_PLLCFGR_PLL1FRACEN) != 0U) in RCC_PLL1_GetVCOOutputFreq()
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dsystem_stm32h7rsxx.c221 if ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) != 0U) in SystemCoreClockUpdate()
Dsystem_stm32h7xx.c370 pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
Dstm32h7r3xx.h14768 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk /*!< PLL1 fractional… macro
Dstm32h7s7xx.h15802 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk /*!< PLL1 fractional… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_rcc.h3821 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Enable()
3871 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN) == RCC_PLLCFGR_PLL1FRACEN) ? 1UL : 0UL); in LL_RCC_PLL1FRACN_IsEnabled()
3925 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Disable()
Dstm32h7rsxx_hal_rcc.h3894 #define __HAL_RCC_PLL1_FRACN_ENABLE() SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN)
3896 #define __HAL_RCC_PLL1_FRACN_DISABLE() CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN)
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dsystem_stm32h7xx_dualcore_bootcm4_cm7gated.c349 pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
Dsystem_stm32h7xx_dualcore_bootcm7_cm4gated.c355 pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
Dsystem_stm32h7xx_dualcore_boot_cm4_cm7.c357 pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
Dsystem_stm32h7xx_singlecore.c350 pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
Dsystem_stm32h7xx.c375 pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
Dstm32h7a3xx.h13053 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk macro
Dstm32h7b0xx.h13497 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk macro
Dstm32h7b0xxq.h13509 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk macro
Dstm32h7a3xxq.h13065 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk macro
Dstm32h7b3xx.h13504 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk macro
Dstm32h7b3xxq.h13516 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk macro
Dstm32h730xxq.h15365 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk macro
Dstm32h733xx.h15353 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk macro
Dstm32h725xx.h14914 #define RCC_PLLCFGR_PLL1FRACEN RCC_PLLCFGR_PLL1FRACEN_Msk macro
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_rcc.h4388 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Enable()
4428 return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN) == RCC_PLLCFGR_PLL1FRACEN) ? 1UL : 0UL); in LL_RCC_PLL1FRACN_IsEnabled()
4471 CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Disable()
Dstm32h7xx_hal_rcc.h7545 #define __HAL_RCC_PLLFRACN_ENABLE() SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN)
7547 #define __HAL_RCC_PLLFRACN_DISABLE() CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLL1FRACEN)
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc.c1426 pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos); in HAL_RCC_GetSysClockFreq()
Dstm32h7xx_hal_rcc_ex.c3089 pll1fracen = RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN; in HAL_RCCEx_GetPLL1ClockFreq()

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