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Searched refs:RCC_PLL4CFGR3_PLL4PDIV2_Pos (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dsystem_stm32n6xx_s.c360 pllp2 = (pllcfgr & RCC_PLL4CFGR3_PLL4PDIV2) >> RCC_PLL4CFGR3_PLL4PDIV2_Pos; in SystemCoreClockUpdate()
Dsystem_stm32n6xx_fsbl.c417 pllp2 = (pllcfgr & RCC_PLL4CFGR3_PLL4PDIV2) >> RCC_PLL4CFGR3_PLL4PDIV2_Pos; in SystemCoreClockUpdate()
Dstm32n645xx.h25554 #define RCC_PLL4CFGR3_PLL4PDIV2_Pos (24U) macro
25555 #define RCC_PLL4CFGR3_PLL4PDIV2_Msk (0x7UL << RCC_PLL4CFGR3_PLL4PDIV2_Pos)/*!< 0x070000…
Dstm32n657xx.h26703 #define RCC_PLL4CFGR3_PLL4PDIV2_Pos (24U) macro
26704 #define RCC_PLL4CFGR3_PLL4PDIV2_Msk (0x7UL << RCC_PLL4CFGR3_PLL4PDIV2_Pos)/*!< 0x070000…
Dstm32n655xx.h26461 #define RCC_PLL4CFGR3_PLL4PDIV2_Pos (24U) macro
26462 #define RCC_PLL4CFGR3_PLL4PDIV2_Msk (0x7UL << RCC_PLL4CFGR3_PLL4PDIV2_Pos)/*!< 0x070000…
Dstm32n647xx.h25796 #define RCC_PLL4CFGR3_PLL4PDIV2_Pos (24U) macro
25797 #define RCC_PLL4CFGR3_PLL4PDIV2_Msk (0x7UL << RCC_PLL4CFGR3_PLL4PDIV2_Pos)/*!< 0x070000…
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c1755 …scInitStruct->PLL4.PLLP2 = ((cfgr_value & RCC_PLL4CFGR3_PLL4PDIV2) >> RCC_PLL4CFGR3_PLL4PDIV2_Pos); in HAL_RCC_GetOscConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h6288 MODIFY_REG(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4PDIV2, P2 << RCC_PLL4CFGR3_PLL4PDIV2_Pos); in LL_RCC_PLL4_SetP2()
6298 …eturn (uint32_t)(READ_BIT(RCC->PLL4CFGR3, RCC_PLL4CFGR3_PLL4PDIV2) >> RCC_PLL4CFGR3_PLL4PDIV2_Pos); in LL_RCC_PLL4_GetP2()
Dstm32n6xx_hal_rcc.h3951 ((((__PLLP2__) << RCC_PLL4CFGR3_PLL4PDIV2_Pos) & RCC_PLL4CFGR3_PLL4PDIV2)))); \