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Searched refs:RCC_PLL4CFGR1_PLL4BYP (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dsystem_stm32n6xx_s.c352 pllbypass = pllcfgr & RCC_PLL4CFGR1_PLL4BYP; in SystemCoreClockUpdate()
Dsystem_stm32n6xx_fsbl.c409 pllbypass = pllcfgr & RCC_PLL4CFGR1_PLL4BYP; in SystemCoreClockUpdate()
Dstm32n645xx.h25519 #define RCC_PLL4CFGR1_PLL4BYP RCC_PLL4CFGR1_PLL4BYP_Msk /*!< PLL4 bypa… macro
Dstm32n657xx.h26668 #define RCC_PLL4CFGR1_PLL4BYP RCC_PLL4CFGR1_PLL4BYP_Msk /*!< PLL4 bypa… macro
Dstm32n655xx.h26426 #define RCC_PLL4CFGR1_PLL4BYP RCC_PLL4CFGR1_PLL4BYP_Msk /*!< PLL4 bypa… macro
Dstm32n647xx.h25761 #define RCC_PLL4CFGR1_PLL4BYP RCC_PLL4CFGR1_PLL4BYP_Msk /*!< PLL4 bypa… macro
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h6073 SET_BIT(RCC->PLL4CFGR1, RCC_PLL4CFGR1_PLL4BYP); in LL_RCC_PLL4_EnableBypass()
6084 CLEAR_BIT(RCC->PLL4CFGR1, RCC_PLL4CFGR1_PLL4BYP); in LL_RCC_PLL4_DisableBypass()
6094 return ((READ_BIT(RCC->PLL4CFGR1, RCC_PLL4CFGR1_PLL4BYP) == RCC_PLL4CFGR1_PLL4BYP) ? 1UL : 0UL); in LL_RCC_PLL4_IsEnabledBypass()
Dstm32n6xx_hal_rcc.h3946 …MODIFY_REG(RCC->PLL4CFGR1, (RCC_PLL4CFGR1_PLL4SEL | RCC_PLL4CFGR1_PLL4BYP | RCC_PLL4CFGR1_PLL4DIVM…
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c1760 if ((cfgr_value & RCC_PLL4CFGR1_PLL4BYP) != 0UL) in HAL_RCC_GetOscConfig()