Searched refs:RCC_PLL4CFGR1_PLL4BYP (Results 1 – 9 of 9) sorted by relevance
352 pllbypass = pllcfgr & RCC_PLL4CFGR1_PLL4BYP; in SystemCoreClockUpdate()
409 pllbypass = pllcfgr & RCC_PLL4CFGR1_PLL4BYP; in SystemCoreClockUpdate()
25519 #define RCC_PLL4CFGR1_PLL4BYP RCC_PLL4CFGR1_PLL4BYP_Msk /*!< PLL4 bypa… macro
26668 #define RCC_PLL4CFGR1_PLL4BYP RCC_PLL4CFGR1_PLL4BYP_Msk /*!< PLL4 bypa… macro
26426 #define RCC_PLL4CFGR1_PLL4BYP RCC_PLL4CFGR1_PLL4BYP_Msk /*!< PLL4 bypa… macro
25761 #define RCC_PLL4CFGR1_PLL4BYP RCC_PLL4CFGR1_PLL4BYP_Msk /*!< PLL4 bypa… macro
6073 SET_BIT(RCC->PLL4CFGR1, RCC_PLL4CFGR1_PLL4BYP); in LL_RCC_PLL4_EnableBypass()6084 CLEAR_BIT(RCC->PLL4CFGR1, RCC_PLL4CFGR1_PLL4BYP); in LL_RCC_PLL4_DisableBypass()6094 return ((READ_BIT(RCC->PLL4CFGR1, RCC_PLL4CFGR1_PLL4BYP) == RCC_PLL4CFGR1_PLL4BYP) ? 1UL : 0UL); in LL_RCC_PLL4_IsEnabledBypass()
3946 …MODIFY_REG(RCC->PLL4CFGR1, (RCC_PLL4CFGR1_PLL4SEL | RCC_PLL4CFGR1_PLL4BYP | RCC_PLL4CFGR1_PLL4DIVM…
1760 if ((cfgr_value & RCC_PLL4CFGR1_PLL4BYP) != 0UL) in HAL_RCC_GetOscConfig()