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Searched refs:RCC_PLL3_DIVP (Results 1 – 8 of 8) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_rcc_ex.c291 __HAL_RCC_PLL3CLKOUT_DISABLE(RCC_PLL3_DIVP | RCC_PLL3_DIVQ | RCC_PLL3_DIVR); in RCCEx_PLL3_Config()
393 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP | RCC_PLL3_DIVQ | RCC_PLL3_DIVR); in RCCEx_PLL3_Config()
398 __HAL_RCC_PLL3CLKOUT_DISABLE(RCC_PLL3_DIVP | RCC_PLL3_DIVQ | RCC_PLL3_DIVR); in RCCEx_PLL3_Config()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc_ex.h482 #define RCC_PLL3_DIVP RCC_PLLCFGR_DIVP3EN macro
3969 #define IS_RCC_PLL3CLOCKOUT_VALUE(VALUE) (((VALUE) == RCC_PLL3_DIVP) || \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc_ex.h541 #define RCC_PLL3_DIVP RCC_PLL3CFGR_PLL3PEN macro
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_rcc.h883 #define RCC_PLL3_DIVP RCC_PLL3CR_DIVPEN macro
887 #define IS_RCC_PLL3CLOCKOUT_VALUE(VALUE) (((VALUE) == RCC_PLL3_DIVP) || \
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc_ex.h564 #define RCC_PLL3_DIVP RCC_PLL3CFGR_PLL3PEN macro
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc_ex.c3859 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP); in RCCEx_PLL3_Config()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c1715 if (__HAL_RCC_GET_PLL3CLKOUT_CONFIG(RCC_PLL3_DIVP) != 0U) in HAL_RCCEx_GetPLL3ClockFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c3098 if (__HAL_RCC_GET_PLL3_CLKOUT_CONFIG(RCC_PLL3_DIVP) != 0U) in HAL_RCCEx_GetPLL3ClockFreq()