Searched refs:RCC_PLL3DIVR2_DIVS_Pos (Results 1 – 6 of 6) sorted by relevance
1641 plls = ((RCC->PLL3DIVR2 & RCC_PLL3DIVR2_DIVS) >> RCC_PLL3DIVR2_DIVS_Pos) + 1U; in HAL_RCC_GetPLL3SFreq()1815 RCC_OscInitStruct->PLL3.PLLS = (((regvalue & RCC_PLL3DIVR2_DIVS) >> RCC_PLL3DIVR2_DIVS_Pos) + 1U); in HAL_RCC_GetOscConfig()
5042 …return (uint32_t)((READ_BIT(RCC->PLL3DIVR2, RCC_PLL3DIVR2_DIVS) >> RCC_PLL3DIVR2_DIVS_Pos) + 1UL); in LL_RCC_PLL3_GetS()5118 MODIFY_REG(RCC->PLL3DIVR2, RCC_PLL3DIVR2_DIVS, (S - 1UL) << RCC_PLL3DIVR2_DIVS_Pos); in LL_RCC_PLL3_SetS()
15711 #define RCC_PLL3DIVR2_DIVS_Pos (0U) macro15712 #define RCC_PLL3DIVR2_DIVS_Msk (0x7UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000007 */15714 #define RCC_PLL3DIVR2_DIVS_0 (0x1UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000001 */15715 #define RCC_PLL3DIVR2_DIVS_1 (0x2UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000002 */15716 #define RCC_PLL3DIVR2_DIVS_2 (0x4UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000004 */
16769 #define RCC_PLL3DIVR2_DIVS_Pos (0U) macro16770 #define RCC_PLL3DIVR2_DIVS_Msk (0x7UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000007 */16772 #define RCC_PLL3DIVR2_DIVS_0 (0x1UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000001 */16773 #define RCC_PLL3DIVR2_DIVS_1 (0x2UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000002 */16774 #define RCC_PLL3DIVR2_DIVS_2 (0x4UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000004 */
16349 #define RCC_PLL3DIVR2_DIVS_Pos (0U) macro16350 #define RCC_PLL3DIVR2_DIVS_Msk (0x7UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000007 */16352 #define RCC_PLL3DIVR2_DIVS_0 (0x1UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000001 */16353 #define RCC_PLL3DIVR2_DIVS_1 (0x2UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000002 */16354 #define RCC_PLL3DIVR2_DIVS_2 (0x4UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000004 */
16129 #define RCC_PLL3DIVR2_DIVS_Pos (0U) macro16130 #define RCC_PLL3DIVR2_DIVS_Msk (0x7UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000007 */16132 #define RCC_PLL3DIVR2_DIVS_0 (0x1UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000001 */16133 #define RCC_PLL3DIVR2_DIVS_1 (0x2UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000002 */16134 #define RCC_PLL3DIVR2_DIVS_2 (0x4UL << RCC_PLL3DIVR2_DIVS_Pos) /*!< 0x00000004 */
