Searched refs:RCC_PLL3DIVR1_DIVQ (Results 1 – 7 of 7) sorted by relevance
1611 pllq = ((RCC->PLL3DIVR1 & RCC_PLL3DIVR1_DIVQ) >> RCC_PLL3DIVR1_DIVQ_Pos) + 1U; in HAL_RCC_GetPLL3QFreq()1813 RCC_OscInitStruct->PLL3.PLLQ = (((regvalue & RCC_PLL3DIVR1_DIVQ) >> RCC_PLL3DIVR1_DIVQ_Pos) + 1U); in HAL_RCC_GetOscConfig()
5022 …return (uint32_t)((READ_BIT(RCC->PLL3DIVR1, RCC_PLL3DIVR1_DIVQ) >> RCC_PLL3DIVR1_DIVQ_Pos) + 1UL); in LL_RCC_PLL3_GetQ()5096 MODIFY_REG(RCC->PLL3DIVR1, RCC_PLL3DIVR1_DIVQ, (Q - 1UL) << RCC_PLL3DIVR1_DIVQ_Pos); in LL_RCC_PLL3_SetQ()
4227 … ((((__PLL3Q__) - 1U) << RCC_PLL3DIVR1_DIVQ_Pos) & RCC_PLL3DIVR1_DIVQ) | \
14984 #define RCC_PLL3DIVR1_DIVQ RCC_PLL3DIVR1_DIVQ_Msk /*!< DIVQ3[6:0] bits: … macro
16018 #define RCC_PLL3DIVR1_DIVQ RCC_PLL3DIVR1_DIVQ_Msk /*!< DIVQ3[6:0] bits: … macro
15616 #define RCC_PLL3DIVR1_DIVQ RCC_PLL3DIVR1_DIVQ_Msk /*!< DIVQ3[6:0] bits: … macro
15384 #define RCC_PLL3DIVR1_DIVQ RCC_PLL3DIVR1_DIVQ_Msk /*!< DIVQ3[6:0] bits: … macro