Searched refs:RCC_PLL3DIVR1_DIVN (Results 1 – 7 of 7) sorted by relevance
1810 RCC_OscInitStruct->PLL3.PLLN = ((regvalue & RCC_PLL3DIVR1_DIVN) + 1U); in HAL_RCC_GetOscConfig()2259 plln = (tmpreg2 & RCC_PLL3DIVR1_DIVN) + 1U; in RCC_PLL3_GetVCOOutputFreq()
4992 …return (uint32_t)((READ_BIT(RCC->PLL3DIVR1, RCC_PLL3DIVR1_DIVN) >> RCC_PLL3DIVR1_DIVN_Pos) + 1UL); in LL_RCC_PLL3_GetN()5063 MODIFY_REG(RCC->PLL3DIVR1, RCC_PLL3DIVR1_DIVN, (N - 1UL) << RCC_PLL3DIVR1_DIVN_Pos); in LL_RCC_PLL3_SetN()
4225 WRITE_REG(RCC->PLL3DIVR1, ((((__PLL3N__) - 1U) & RCC_PLL3DIVR1_DIVN) | \
14960 #define RCC_PLL3DIVR1_DIVN RCC_PLL3DIVR1_DIVN_Msk /*!< DIVN3[8:0] bits: … macro
15994 #define RCC_PLL3DIVR1_DIVN RCC_PLL3DIVR1_DIVN_Msk /*!< DIVN3[8:0] bits: … macro
15592 #define RCC_PLL3DIVR1_DIVN RCC_PLL3DIVR1_DIVN_Msk /*!< DIVN3[8:0] bits: … macro
15360 #define RCC_PLL3DIVR1_DIVN RCC_PLL3DIVR1_DIVN_Msk /*!< DIVN3[8:0] bits: … macro