Searched refs:RCC_PLL3CFGR1_PLL3BYP (Results 1 – 9 of 9) sorted by relevance
337 pllbypass = pllcfgr & RCC_PLL3CFGR1_PLL3BYP; in SystemCoreClockUpdate()
394 pllbypass = pllcfgr & RCC_PLL3CFGR1_PLL3BYP; in SystemCoreClockUpdate()
25465 #define RCC_PLL3CFGR1_PLL3BYP RCC_PLL3CFGR1_PLL3BYP_Msk /*!< PLL3 bypa… macro
26614 #define RCC_PLL3CFGR1_PLL3BYP RCC_PLL3CFGR1_PLL3BYP_Msk /*!< PLL3 bypa… macro
26372 #define RCC_PLL3CFGR1_PLL3BYP RCC_PLL3CFGR1_PLL3BYP_Msk /*!< PLL3 bypa… macro
25707 #define RCC_PLL3CFGR1_PLL3BYP RCC_PLL3CFGR1_PLL3BYP_Msk /*!< PLL3 bypa… macro
5723 SET_BIT(RCC->PLL3CFGR1, RCC_PLL3CFGR1_PLL3BYP); in LL_RCC_PLL3_EnableBypass()5734 CLEAR_BIT(RCC->PLL3CFGR1, RCC_PLL3CFGR1_PLL3BYP); in LL_RCC_PLL3_DisableBypass()5744 return ((READ_BIT(RCC->PLL3CFGR1, RCC_PLL3CFGR1_PLL3BYP) == RCC_PLL3CFGR1_PLL3BYP) ? 1UL : 0UL); in LL_RCC_PLL3_IsEnabledBypass()
3843 …MODIFY_REG(RCC->PLL3CFGR1, (RCC_PLL3CFGR1_PLL3SEL | RCC_PLL3CFGR1_PLL3BYP | RCC_PLL3CFGR1_PLL3DIVM…
1733 if ((cfgr_value & RCC_PLL3CFGR1_PLL3BYP) != 0UL) in HAL_RCC_GetOscConfig()